[21p-233-1~14] 13.4 Si wafer processing /Si based thin film /Interconnect technology/ MEMS/ Integration technology

[21p-233-9] Development of CMOS-MEMS Co-Integrated Devices Using Minimal-Fab Process

〇Yongxun Liu¹, Hiroyuki Tanaka^1,2, Kazuhiro Koga², Sommawan Khumpuang^1,2, Masayoshi Nagao¹, Takashi Matsukawa¹, Shiro Hara^1,2 (1.AIST, 2.MINIMAL)

Keywords:Minimal-fab, Diaphragm

So far, we have fabricated SOI-CMOS by using the SOD (Spin on dopant) solid source thermal diffusion method. In this work, we fabricate CMOS integrated circuits on ultrathin SOI daiphragms by using minimal-fab mask aligner and deep-RIE, and report the electrical characteristics of the fabricated CMOS before and after the diaphram formation.