The 80th JSAP Autumn Meeting 2019

Presentation information

Oral presentation

13 Semiconductors » 13.3 Insulator technology

[19p-E305-1~15] 13.3 Insulator technology

Thu. Sep 19, 2019 1:45 PM - 5:45 PM E305 (E305)

Toshifumi Irisawa(AIST), Kiyoteru Kobayashi(Tokai Univ.)

5:30 PM - 5:45 PM

[19p-E305-15] Evaluation of Border Traps in Al2O3/GeOx/p-Ge Stacks Using Deep-Level Transient Spectroscopy

〇(DC)Weichen Wen1, Keisuke Yamamoto1, Dong Wang1, Hiroshi Nakashima2 (1.IGSES, Kyushu Univ., 2.GIC, Kyushu Univ.)

Keywords:Border trap, DLTS, Ge MOS

Interface traps (ITs) and border traps (BTs) in Al2O3/GeOx/p-Ge gate stacks were characterized using deep-level transient spectroscopy (DLTS). Through evaluating the gate stacks with several thicknesses of GeOx, the BTs in Al2O3, at Al2O3/GeOx interface, in GeOx were detected. The highest density of BT was found at Al2O3/GeOx interface.