[10p-S221-1~10] 13.5 Semiconductor devices/ Interconnect/ Integration technologies

[10p-S221-7] Low-leakage design of a new piezoelectronic transistor and its SRAM application

〇Yusaku Shiotsu¹, Shuu'ichiro Yamamoto¹, Hiroshi Funakubo², Minoru Kuribayashi Kurosawa³, Satoshi Sugahara¹ (1.FIRST, Tokyo Inst. of Tech., 2.Dept. of Mater. Sci. and Eng., Tokyo Inst. of Tech., 3.Dept. of Electr. and Electron. Eng., Tokyo Inst. of Tech.)

Keywords:Piezoelectronic transistor