The 83rd JSAP Autumn Meeting 2022

Presentation information

Oral presentation

13 Semiconductors » 13.4 Si processing /Si based thin film / MEMS / Equipment technology

[20p-A406-1~13] 13.4 Si processing /Si based thin film / MEMS / Equipment technology

Tue. Sep 20, 2022 1:00 PM - 4:30 PM A406 (A406)

Tatsuya Okada(Univ. of the Ryukyus), Reo Kometani(Univ. of Tokyo)

4:00 PM - 4:15 PM

[20p-A406-12] Comparison of Fully-Depleted(FD) and Partially-Depleted(PD) Operation of SOI CMOS of Minimal Fab

Takeshi Hamamoto1, Shingo Ura3, Masahiro Matsuda3, Yuji Kitayama4, Satoshi Maruyama4, Sommawan Khumpuang2, Yasunari Shiba4, Tadaaki Tsuchiya3, Shiro Hara2 (1.MINIMAL, 2.AIST, 3.Logic Research, 4.Yokogawa Solution Service)

Keywords:SOI

Minimal fab is a production system targeting high-mix low-volume production. In this minimal fab, MEMS devices such as cantilever, CMOS and operational amplifiers has been fabricated. In the next step, we are at the stage of creating PDKs and focusing on improving the operating accuracy of MOSFETs and enlargining process robustness. There are two types of operation modes for SOI CMOS: fully depleted operation and partially depleted operation. In this time, we compared the NMOS characteristics of these two operation modes and clarified the advantages of each operation.