The 70th JSAP Spring Meeting 2023

Presentation information

Oral presentation

13 Semiconductors » 13.5 Semiconductor devices/ Interconnect/ Integration technologies

[16p-A403-1~20] 13.5 Semiconductor devices/ Interconnect/ Integration technologies

Thu. Mar 16, 2023 1:00 PM - 6:45 PM A403 (Building No. 6)

Kazuhiko Endo(Tohoku Univ.), Kimihiko Kato(AIST)

3:30 PM - 3:45 PM

[16p-A403-9] Simulation Study on the Effects of Charge Traps in a Ferroelectric Tunnel Junction

〇(M2)Jaehyun Kim1, Takuya Saraya1, Toshiro Hiramoto1, Masaharu Kobayashi1,2 (1.IIS, Univ. of Tokyo, 2.d.lab, Univ. of Tokyo)

Keywords:ferroelectric material, ferroelectric tunnel junction, Non-volatile memory

Hafnium oxide (HfO2) based Ferroelectric Tunnel Junction (FTJ) has various advantages such as high-density data storage, non-destructive readout, high-speed write/read operation, and compatibility with CMOS process, having the possibility to be the next-generation non-volatile memory. The performance index of FTJ is the tunneling electrical resistance ratio (TER) due to the polarization reversal of the ferroelectric. However, the effects of charge traps generated in the ferroelectric layer on TER and reliability have not been investigated. In this study, we constructed an FTJ model with Hf0.5Zr0.5O2 (HZO) as the tunnel layer using TCAD, and investigated the effects of ferroelectric polarization reversal and charge traps in HZO on TER by simulation.