[17a-B414-1~7] 17.3 Layered materials

▲ [17a-B414-7] EOT scaling of top-gate MoS₂ FET below 1 nm

〇(D)Li Shuhong¹, Tomonori Nishimura¹, Kosuke Nagashio¹ (1.Univ. of Tokyo)

Keywords:top gate 2D FET, EOT scaling, high-k oxides

Thermal evaporation of Er₂O₃ has shown great potential as an alternative to atomic layer deposition for the scaling of equivalent oxide thickness (EOT) as a top-gate insulator in 2D transistors. However, the reduction of oxide thickness can lead to the loss of dielectric properties and unexpected changes at the interface, which requires further investigation of devices with thinner insulators. In this work, we demonstrate the successful integration of 3.5 nm of Er₂O₃ as the top gate of a MoS₂ FET, resulting in an on/off switch within 1 V and an EOT of 0.94 nm. Low-temperature photoluminescence and Raman characterization reveal minimal defects introduced by the Er₂O₃ deposition, indicating the potential for further scaling by applying this novel deposition method to 2D FETs.