Self-Aligned Embedded Metal Double-Gate Low-Temperature Poly-Si TFT (2)

Presentation information

Poster presentation

13. Semiconductors A (Silicon) » 13.5 Si process technology

Thu. Sep 19, 2013 9:30 AM - 11:30 AM P5 (Davis Memorial Auditorium)

9:30 AM - 11:30 AM

^○Shun Sasaki¹, Akito Hara¹ (Tohoku Gakuin Univ.¹)

Keywords:poly-Si,TFT,double-gate