Poster presentation

[19a-P5-1~14] 13.5 Si process technology

Thu. Sep 19, 2013 9:30 AM - 11:30 AM P5 (Davis Memorial Auditorium)

△：Young Scientist Oral Presentation Award Applied
▲：English Presentation
▼：Both Award Applied and English Presentation

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9:30 AM - 11:30 AM

[19a-P5-1] Neural Network using Thin-Film Transistors

^○(BC)Ryohei Morita¹, Yuki Yamaguti¹, Mutsumi Kimura¹, Tokiyoshi Matsuda¹ (Ryukoku Univ¹)

9:30 AM - 11:30 AM

[19a-P5-2] Characteristic Evaluation of Neuron MOS Inverter using Poly-Si TFTs

^○Kenji Shimada¹, Tokiyosi Matsuda¹, Mutsumi Kimura¹ (Ryukoku Univ.¹)

9:30 AM - 11:30 AM

△ [19a-P5-3] Self-Aligned Metal Double-Gate Ni-SPC Poly-Si TFTs Fabricated at Low Temperature on Glass Substrate

^○(M1)Tatsuya Meguro¹, Akito Hara¹ (Tohoku Gakuin Univ.¹)

9:30 AM - 11:30 AM

△ [19a-P5-4] Self-Aligned Embedded Metal Double-Gate Low-Temperature Poly-Si TFT (2)

^○Shun Sasaki¹, Akito Hara¹ (Tohoku Gakuin Univ.¹)

9:30 AM - 11:30 AM

[19a-P5-5] Relationship between Crystal Growth of Polycrystalline Si Film and Crystal Defect Density by Visible Laser Irradiation

^○Naoya Kawamoto¹, Kazuyuki Tadatomo¹, Akira Heya², Naoto Matsuo² (Yamaguchi Univ.¹, Univ. of Hyogo²)

9:30 AM - 11:30 AM

[19a-P5-6] Effect of laser-beam overlapping irradiation in DLB-CLC poly-Si crystallization

^○Masayuki Yamano¹, Shin-Ichiro Kuroki¹, Tadashi Sato¹, Nobuhiro Hata², Koji Kotani³, Takamaro Kikkawa¹ (RNBS¹, AIST², Tohoku Univ.³)

9:30 AM - 11:30 AM

[19a-P5-7] Characteristics and Channel Grain Conditions of Crystalline Silicon Thin-Film Transistors Fabricated by Micro-Thermal-Plasma-Jet Crystallization

^○Shohei Hayashi^1,2, Yuji Fujita¹, Seiji Morisaki¹, Takahiro Kamikura¹, Shogo Yamamoto¹, Seiichiro Higashi¹ (Hiroshima Univ.¹, JSPS Research Fellow DC²)

9:30 AM - 11:30 AM

[19a-P5-8] Fabrication of UTB-GeOI wafers with thin Al₂O₃/SiO₂ BOX layers

^○Yoshihiko Moriyama^1,2, keiji Ikeda¹, Shotaro Takeuchi², Yuuichi Kamimuta¹, Yoshiaki Nakamura², Akira Sakai², Koji Izunome³, Tsutomu Tezuka¹ (GNC-AIST¹, Osaka Univ.², GlobalWafers Japan³)

9:30 AM - 11:30 AM

[19a-P5-9] Liquid-phase deposition of thin Si, Ge, and SiGe films based on ballistic electron injection

^○Mitsuki Ito¹, Ryutaro Suda¹, Mamiko Yagi¹, Akira Kojima¹, Mentek Romain¹, Jun-ichi Shirakashi¹, Nobuyoshi Koshida¹ (Graduate School of Eng., Tokyo Univ. of Agri. & Technol.¹)

9:30 AM - 11:30 AM

[19a-P5-10] Low-temperature activation of boron in silicon by soft X-ray irradiation using cooling sample holder

^○Heya Akira¹, Kusakabe Fumito¹, Maruyama Yuki¹, Matsuo Naoto¹, Kanda Kazuhiro², Noguchi Takashi³ (Dept. Mat. Sci. Chem. Univ. of Hyogo¹, LASTI Univ. of Hyogo², The Univ. of Ryukyu³)

9:30 AM - 11:30 AM

[19a-P5-11] Effect of n-type Impurities and Sulfur on Carrier Concentrations in Poly-crystalline Ge

^○Masahiro Koike¹, Yuuichi Kamimuta¹, Yoshiki Kamata¹, Etsuo Kurosawa¹, Tsutomu Tezuka¹ (GNC, AIST¹)

9:30 AM - 11:30 AM

▲ [19a-P5-12] Electrical Characteristics of Ge/Si Hetero-Junction Tunnel Field-Effect Transistors and their Post Annealing Effects

^○(D)Minsoo Kim¹, Yuki Wakabayashi¹, Ryosho Nakane¹, Masafumi Yokoyama¹, Mitsuru Takenaka¹, Shinichi Takagi¹ (The Univ. of Tokyo¹)

9:30 AM - 11:30 AM

[19a-P5-13] Improvement of activation rate of epitaxially grown n⁺-Ge:P and reduction of contact resistance between Ti electrode and Ge:P layer

^○Yoshihiko Moriyama^1,2, Yuuichi Kamimuta¹, Yoshiki Kamata¹, Keiji Ikeda¹, Shotaro Takeuchi², Yoshiaki Nakamura², Akira Sakai², Tsutomu Tezuka¹ (GNC-AIST¹, Osaka Univ.²)

9:30 AM - 11:30 AM

[19a-P5-14] Development of Al Damage-less Silicon anisotropic Etchant

^○Tsuguhiro Tago^1,2, Kunio Ichino², Mayumi Kimura¹, kenji Isami¹ (HAYASHI PURE CHEMICAL IND.,LTD.¹, Graduate School of Engineering, Tottori University²)

Oral presentation

[19p-B4-1~21] 13.5 Si process technology

Thu. Sep 19, 2013 1:30 PM - 7:00 PM B4 (TC2 1F-106)

△：Young Scientist Oral Presentation Award Applied
▲：English Presentation
▼：Both Award Applied and English Presentation

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1:30 PM - 1:45 PM

[19p-B4-1] Grain Position Control by Leading Wave Crystallization of Amorphous Silicon Films Induced by Micro-Thermal-Plasma-Jet Irradiation and Characterization of TFTs

^○Shohei Hayashi^1,2, Seiji Morisaki¹, Takahiro Kamikura¹, Shogo Yamamoto¹, Kohei Sakaike^1,2, Muneki Akazawa¹, Seiichiro Higashi¹ (Hiroshima Univ.¹, JSPS Research Fellow DC²)

1:45 PM - 2:00 PM

[19p-B4-2] Characteristic Evaluation of fine TFTs Crystallized by Micro Thermal Plasma Jet Irradiation

^○Seiji Morisaki¹, Shohei Hayashi¹, Takahiro Kamikura¹, Shogo Yamamoto¹, Muneki Akazawa¹, Kohei Sakaike¹, Seiichiro Higashi¹ (Graduate School of Advanced Sciences of Matter, Hiroshima University¹)

2:00 PM - 2:15 PM

[19p-B4-3] Investigation on Cracks Reduction by Buffer Layers in Thermal-Plasma-Jet Crystallized Amorphous Silicon Films on Glass Substrate

^○Keisuke Tanaka¹, shohei Hayashi¹, Takahiro Kamikura¹, Seiichiro Higashi¹ (Grad. School of AdSM, Hiroshima Univ.¹)

2:15 PM - 2:30 PM

▲ [19p-B4-4] Comparison of crystalline quality of SPC Si films grown on YSZ layers with that on glass substrates in pulse laser annealing

^○Lien Mai¹, Susumu Horita¹ (JAIST¹)

2:30 PM - 2:45 PM

△ [19p-B4-5] Low Resistance of Heavy Phosphorus-doped Si Film by 2-step RTA

^○(M1)Tomohide Wakasugi¹, Satoshi Chinen¹, Tatsuya Okada¹, Hiroshi Aozasa¹, Takashi Noguchi¹, Taketsugu Itoh² (Ryukyus Univ.¹, Itoh Device Consulting²)

2:45 PM - 3:00 PM

[19p-B4-6] Enhancement of Au induced crystallization for amorphous Ge by electron irradiation

^○(B)Kenta Moto¹, Shin Sakiyama¹, Takatsugu Sakai¹, Kazutoshi Nakashima¹, Kenichiro Takakura¹, Isao Tsunoda¹ (Kumamoto National College of Technology¹)

3:00 PM - 3:15 PM

[19p-B4-7] High Speed Lateral Crystallization of Amorphous Germanium Film Induced by Atomospheric Pressure Micro-Thermal-Plasma-Jet Irradiation

^○(M2)Takahiro Kamikura¹, Shohei Hayashi¹, Seiji Morisaki¹, Shogo Yamamoto¹, Seiichiro Higashi¹ (Hiroshima Univ.¹)

3:15 PM - 3:30 PM

[19p-B4-8] Photoluminescence study on recrystallization of ultra shallow As implanted layer

^○Shuji Tagawa¹, Shoichirou Yamada¹, Gota Murai¹, Masahiro Yoshimoto¹, Yoo Woo Sik² (Kyoto Institute of Technology¹, WaferMasters,Inc.²)

3:30 PM - 3:45 PM

[19p-B4-9] Luminescence from SiO2 by Helium Ion Microscope (HIM) without any Damage Characterized by TEM-EELS

^○Shinichi Ogawa¹, Tomohiko Iijima¹, Ryuichi Sugie², Naohiko Kawasaki², Yuji Otsuka² (AIST¹, Toray Res. Ctr.²)

3:45 PM - 4:00 PM

△ [19p-B4-10] Evaluation of Anisotropic Biaxial Stress in Si Nano Area by Raman Spectroscopy Using Surface Plasmon Resonance

^○Ryuhei Iwasaki¹, Kohki Nagata¹, Motohiro Tomita¹, Daisuke Kosemura¹, Atsushi Ogura¹ (Meiji Univ.¹)

Break （4:00 PM - 4:15 PM）

4:15 PM - 4:30 PM

[19p-B4-11] Low-Temperature Layer Transfer of Silicon Films with Midair Cavity Using Meniscus Force

^○(DC)Kohei Sakaike¹, Shogo Nakamura¹, Muneki Akazawa¹, Takashi Fukunaga¹, Seiji Morisaki¹, Shohei Hayashi¹, Seiichiro Higashi¹ (Hiroshima Univ.¹)

4:30 PM - 4:45 PM

[19p-B4-12] Local Area Transfer of Thermally Oxidized Silicon Films with Midair Cavity Using Meniscus Force

^○Muneki Akazawa¹, Kohei Sakaike¹, Shogo Nakamura¹, Takashi Fukunaga¹, Shohei Hayashi¹, Seiji Morisaki¹, Seiichiro Hagashi¹ (AdSM, Hiroshima Univ.¹)

4:45 PM - 5:00 PM

△ [19p-B4-13] Effects of Ar plasma irradiation on SAB based Si/Si junctions

^○Masashi Morimoto¹, JianBo Laing¹, Shora Nishida¹, Naoteru Shigekawa¹ (Osaka city Univ¹)

5:00 PM - 5:15 PM

[19p-B4-14] In-Situ Measurement of Chemical Vapor Deposition Using Langasite Crystal Microbalance (1)

Misako Matsui¹, Ayumi Saito¹, ^○Hitoshi Habuka¹ (Yokohama Nat. Univ.¹)

5:15 PM - 5:30 PM

[19p-B4-15] In-Situ Measurement of Chemical Vapor Deposition Using Langasite Crystal Microbalance (2)

^○Misako Matsui¹, Hitoshi Habuka¹ (Yokohama Nat. Univ.¹)

5:30 PM - 5:45 PM

[19p-B4-16] Electrical Characterization of SiO2 Films Deposited by RF Sputtering Using O2/Ar Mixture

^○Kimihiko Imura¹, Tatsuya Okada¹, Koya Sugihara¹, Kiyoharu Shimoda¹, Takashi Noguchi¹ (Univ. of the Ryukyu¹)

5:45 PM - 6:00 PM

[19p-B4-17] Effects of Sputtering Gas on Formation of Ultrathin PtHfSi Film

^○Yasuhiko Yoshimrua¹, Shun-ichiro Ohmi¹ (Tokyo Institute of Technology¹)

6:00 PM - 6:15 PM

△ [19p-B4-18] Low-contact resistance and Fermi-level depinning in metal/n-Ge junction by inserting W-encapsulating Si clusters

^○Naoya Okada^1,2, Noriyuki Uchida², Toshihiko Kanayama^1,3 (Inst. of Appl. Phys. Univ. of Tsukuba¹, AIST-Nanoelectronics Research Institute², AIST³)

6:15 PM - 6:30 PM

[19p-B4-19] By-Product Formation Behavior in Silicon Epitaxial Growth from Chlorosilane Gas

^○Ayumi Sakurai¹, Hitoshi Habuka¹ (Yokohama Nat. Univ.¹)

6:30 PM - 6:45 PM

▲ [19p-B4-20] Activation of Silicon Implanted with Dopant Atoms by Microwave Heating

^○(B)Tomohiko Nakamura¹, Satoshi Shigeno¹, Shinya Yoshidomi¹, Masahiko Hasumi¹, Toshiko Ishii¹, Toshiyuki Sameshima¹, Yutaka Inouchi², Masao Naito², Tomohisa Mizuno³ (TUAT¹, Nissin Ion Equipment Co.,Ltd.², Kanagawa Univ.³)

6:45 PM - 7:00 PM

[19p-B4-21] Active dopant profiling of ultra shallow junction in Si substrate using SSRM (Ⅱ)

^○Hidenori Osae¹, Satoshi Abo¹, Fujio Wakaya¹, Toshiaki Iwamatsu², Hidekazu Oda², Mikio Takai¹ (Center for Quantum Science and Technology under Extreme Conditions,Osaka University.¹, Renesas Electronics Corporation.²)

Oral presentation

[20a-B4-1~11] 13.5 Si process technology

Fri. Sep 20, 2013 9:00 AM - 12:00 PM B4 (TC2 1F-106)

△：Young Scientist Oral Presentation Award Applied
▲：English Presentation
▼：Both Award Applied and English Presentation

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9:00 AM - 9:15 AM

[20a-B4-1] Scallop reduction processing of Si trench sidewalls by ICP-RIE using F₂+He gas

^○Ryo Mikasa¹, Satoko Shinkai², Yuki Noda³, Shinichi Motoyama³ (Kyushu Inst. of Tech.¹, CMS, Kyushu Inst. of Tech.², SAMCO Inc.³)

9:15 AM - 9:30 AM

[20a-B4-2] Technique of Wide Area Si Etching with ClF₃ Cluster Beam

^○Yu Yoshino¹, Takehiko Senoo¹, Kunihiko Koike¹, Toshio Seki², Takaaki Aoki², Jiro Matsuo² (Iwatani Corp.¹, Kyoto Univ.²)

9:30 AM - 9:45 AM

[20a-B4-3] Minimal System of Micro-Plasma Dry Etcher Equipment

^○Hiroyuki Tanaka², Shizuka Nakano^1,2, Yoshiki Shimizu^1,2, Hisato Ogiso^1,2, Shinji Futagawa³, Hideaki Yoshioka³, Takahiro Fukuda³, Yoshinori Uchiyama³, Sommawan Khumpuang^1,2, Shiro Hara^1,2 (AIST¹, MINIMAL², Design Network³)

9:45 AM - 10:00 AM

[20a-B4-4] Influence of edge beveling in small diameter wafer for resist coating

^○Shuuji Okuda¹, Norio Umeyama^1,2, Atsushi Yamazaki^1,3, Haruo Sumizawa^1,3, Koichiro Ichikawa^1,3, Sho Takeuchi^1,4, Yoshihisa Sensu^1,4, Sommawan Khumpuang^1,2, Shiro Hara^1,2 (MINIMAL¹, AIST², Fujikoshi³, LTJ⁴)

10:00 AM - 10:15 AM

[20a-B4-5] Half-Inch Silicon CVD Reactor Using Concentrated Infrared Light Heater

^○Ning Li¹, Hitoshi Habuka¹, Shin-ichi Ikeda^2,3, Yuki Ishida^2,3, Shiro Hara^2,3 (Yokohama Nat. Univ.¹, AIST², Minimal Fab Development Association³)

10:15 AM - 10:30 AM

[20a-B4-6] Sputter Deposition Equipment for Minimal Fab

^○Hisato Ogiso^1,2, Shizuka Nakano^1,2, Ken Yukimura¹, Akihiko Kato^2,3, Yuki Yabuta^2,3, Sommawan Khumpuang^1,2, Shiro Hara^1,2 (AIST¹, Minimal², Seinan³)

Break （10:30 AM - 10:45 AM）

10:45 AM - 11:00 AM

[20a-B4-7] Mechanism of Thermal Oxidation Process using the Minimal Laser Heating Equipment

^○Haruki Toonoe², Takashi Yajima², Takashi Chiba^1,2, Masao Terada^1,2, Shinichi Ikeda^2,3, Sommawan Khumpuang^2,3, Shiro Hara^2,3 (Sakaguchi E.H VOC Corp¹, Minimal², AIST³)

11:00 AM - 11:15 AM

[20a-B4-8] Control of the Uniformity of Lithography Resolution in Minimal Mask-less Exposure System.

^○Yuuji Kitayama¹, Haruki Toonoe¹, Yoshie Ishii^1,2, Ryouichi Irita^1,2, Kenji Miyake^1,2, Sommawan Khumpuang^1,3, Shiro Hara^1,3 (MINIMAL¹, PMT², AIST³)

11:15 AM - 11:30 AM

[20a-B4-9] CMP processes for Si and SiO₂ surfaces using a minimal CMP machine

^○Norio Umeyama^1,2, Fumito Imura^1,2, Katsuhiko Nakato¹, Kazutaka Shibuya^1,3, Yoshio Nakamura^1,3, Kouichiro Ichikawa³, Sommawan Khumpuang^1,2, Shiro Hara^1,2 (MINIMAL¹, AIST², Fujikoshi Machinery³)

11:30 AM - 11:45 AM

[20a-B4-10] Cleanroom-Free Minimal Air Circulation System For PLAD

^○Takashi Yajima¹, Sommawan Khumpuang^1,2, Hitoshi Maekawa^1,2, Shiro Hara^1,2 (MINIMAL¹, AIST²)

11:45 AM - 12:00 PM

[20a-B4-11] Quick Thermal Oxidation Process using Minimal Resistance Furnace

^○Shinnosuke Suzuki^1,2, Ayami Yaginuma^1,2, Kiyohiko Morikawa^1,2, Masashi Hattori^1,2, katsuhiko Nakato², Takanori Mikahara², Ikeda Shinichi^2,3, Sommawan Khumpuang^2,3, Shiro Hara^2,3 (KOYO Thermo Systems¹, MINIMAL², AIST³)

Oral presentation

[20p-B4-1~8] 13.5 Si process technology

Fri. Sep 20, 2013 1:00 PM - 3:00 PM B4 (TC2 1F-106)

△：Young Scientist Oral Presentation Award Applied
▲：English Presentation
▼：Both Award Applied and English Presentation

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Lunch （12:00 PM - 1:00 PM）

1:00 PM - 1:15 PM

[20p-B4-1] Schottky barrier elimination mechanism by pinnig at S-pair in Si

^○Koichi Kato¹, Takao Marukame¹, Yoshifumi Nishi¹, Yuichiro Mitani¹ (Toshiba R&D Cent.¹)

1:15 PM - 1:30 PM

[20p-B4-2] Ni silicidation rate in Si nanowires (1) Impact of the thermal history

^○Hiroki Yamashita¹, Yasuhiro Shikahama¹, Hiroki Kosugiyama¹, Shuichiro Hashimoto¹, Kohei Takei¹, Jing Sun¹, Takashi Matsukawa², Meishoku Masahara², Takanobu Watanabe¹ (Waseda Univ.¹, AIST²)

1:30 PM - 1:45 PM

[20p-B4-3] Ni silicidation rate in Si nanowires (2) Ion dose dependency

^○Hiroki Kosugiyama¹, Yasuhiro Shikahama¹, Hiroki Yamashita¹, Shuichiro Hashimoto¹, Kouhei Takei¹, Jing Sun¹, Takashi Matsukawa², Meishoku Masahara², Takanobu Watanabe¹ (Waseda Univ.¹, AIST²)

1:45 PM - 2:00 PM

[20p-B4-4] Characterization of Thin NiSi₂ Films by Stacked Silicidation Sputtering Process with Kr Gas

^○Hiroaki Imamura¹, Taichi Inamura¹, Kuniyuki Kakushima², Yoshinori Kataoka², Akira Nishiyama², Nobuyuki Sugii², Hitoshi Wakabayashi², Kazuo Tsutsui², Kenji Natori¹, Hiroshi Iwai¹ (Tokyo Tech. FRC¹, Tokyo Tech. IGSSE²)

2:00 PM - 2:15 PM

[20p-B4-5] Annealing Temperature Dependence of Electrical Characterization of P-doped NiSi₂ Electrodes on n-Ge Substrates

^○Masaaki Motoki¹, Ryo Yoshihara¹, Kuniyuki Kakushima², Yoshinori Kataoka², Akira Nishiyama², Nobuyuki Sugii², Hitoshi Wakabayashi², Kazuo Tsutsui², Kenji Natori¹, Hiroshi Iwai¹ (Tokyo Tech. FRC¹, Tokyo Tech. IGSSE²)

2:15 PM - 2:30 PM

[20p-B4-6] Reduction of Schottky Barrier Height of Sn/n-Ge Contact

^○Akihiro Suzuki¹, Shunsuke Asaba¹, Jun Yokoi¹, Osamu Nakatsuka¹, Masashi Kurosawa^1,2, Mitsuo Sakashita¹, Noriyuki Taoka¹, Shigeaki Zaima¹ (Graduate School of Eng., Nagoya Univ.¹, JSPS Research Fellow²)

2:30 PM - 2:45 PM

△ [20p-B4-7] Schottky Barrier Height Modulation of NiGe/Ge Junction by P segregation

^○Yuya Minoura¹, Takuji Hosoi¹, Jin Matsugaki², Shin-ichiro Kuroki², Takayoshi Shimura¹, Heiji Watanabe¹ (Osaka Univ.¹, Hiroshima Univ.²)

2:45 PM - 3:00 PM

[20p-B4-8] Improvement of As Activation in Ge with As⁺ Ion Implantation at Low Temperature

^○Takahiro Ono¹, Akio Ohta¹, Hiroaki Hanafusa¹, Hideki Murakami¹, Seiichiro Higashi¹, Seiichi Miyazaki² (Grad. School of AdSM, Hiroshima Univ.¹, Grad. School of Eng., Nagoya Univ.²)

Sessions

13. Semiconductors A (Silicon) » 13.5 Si process technology

[19a-P5-1~14] 13.5 Si process technology

△ [19a-P5-3] Self-Aligned Metal Double-Gate Ni-SPC Poly-Si TFTs Fabricated at Low Temperature on Glass Substrate

△ [19a-P5-4] Self-Aligned Embedded Metal Double-Gate Low-Temperature Poly-Si TFT (2)

▲ [19a-P5-12] Electrical Characteristics of Ge/Si Hetero-Junction Tunnel Field-Effect Transistors and their Post Annealing Effects

[19p-B4-1~21] 13.5 Si process technology

▲ [19p-B4-4] Comparison of crystalline quality of SPC Si films grown on YSZ layers with that on glass substrates in pulse laser annealing

△ [19p-B4-5] Low Resistance of Heavy Phosphorus-doped Si Film by 2-step RTA

△ [19p-B4-10] Evaluation of Anisotropic Biaxial Stress in Si Nano Area by Raman Spectroscopy Using Surface Plasmon Resonance

△ [19p-B4-13] Effects of Ar plasma irradiation on SAB based Si/Si junctions

△ [19p-B4-18] Low-contact resistance and Fermi-level depinning in metal/n-Ge junction by inserting W-encapsulating Si clusters

▲ [19p-B4-20] Activation of Silicon Implanted with Dopant Atoms by Microwave Heating

[20a-B4-1~11] 13.5 Si process technology

[20p-B4-1~8] 13.5 Si process technology

△ [20p-B4-7] Schottky Barrier Height Modulation of NiGe/Ge Junction by P segregation