[27p-PB4-1~16] 13.5 Si process technology

[27p-PB4-6] Development of Silicon Wafer Thinning / Backside Via Exposure Process Using Wet Etching

^○Naoya Watanabe¹, Takumi Miyazaki², Masahiro Aoyagi¹, Kazuhiro Yoshikawa^3,4 (National Institute of Advanced Industrial Science and Technology¹, PRE-TECH AT CO., LTD.², Apprecia Technology Inc.³, Graduate School of Engineering, Tohoku University⁴)

Keywords:ウエットエッチング, Siウエハ薄形化, 貫通電極露出