[28a-G9-1~11] 13.6 Silicon devices / Integration technology

[28a-G9-7] Performance and design of pseudo-spin-MOSFET and nonvolatile SRAM cell using nano-CMOS technology

^○Yusuke Shuto^1,3,4, Shuu'ichirou Yamamoto^2,3, Satoshi Sugahara^1,3 (ISEL, Tokyo Inst. Tech.¹, Dept. Info. Processing, Tokyo Inst. Tech.², CREST, JST³, KAST⁴)

Keywords:不揮発性SRAM、スピンMOSFET、パワーゲーティング