[13p-1E-1~17] 15.8 Crystal evaluation, impurities and crystal defects

[13p-1E-13] Bonded Silicon on Insulator Wafers for Power Devices - A Study of Deposited BOX and Room Temperature Bonding -

〇Yoshihiro Koga¹, Kazunari Kurita¹ (1.SUMCO CORPORATION)

Keywords:silicon on insulator wafer,BOX layer deposition,room temperature bonding

Conventional bonded SOI wafer fabrication process have serious improvement technology issues which are difficult to increase BOX layer thickness and that of elimination of fixed charge in BOX layer. Therefore, we consider that the alternative new SOI wafer fabrication process by using BOX layer deposition and room temperature bonding method. As a result, this method doesn’t have any voids as same as conventional method using BOX thermal oxide and high temperature bonding. In addition, this method can decrease fixed charge in BOX layer compare than that of conventional method.