[19p-S423-1~17] 13.4 Si wafer processing /Si based thin film /MEMS/Integration technology

[19p-S423-11] Shift of the Fermi level pinning position at metal/Ge interface by inserting Ge_1−xSn_x layer

〇Akihiro Suzuki¹, Osamu Nakatsuka¹, Mitsuo Sakashita¹, Shigeaki Zaima^1,2 (1.Grad. Sc. of Eng., Nagoya Univ., 2.IMaSS, Nagoya Univ.)

Keywords:Schottky barrier height,Fermi level pinning,Germanium tin