The 63rd JSAP Spring Meeting, 2016

Presentation information

Poster presentation

13 Semiconductors » 13.4 Si wafer processing /Si based thin film /MEMS/Integration technology

[21p-P17-1~26] 13.4 Si wafer processing /Si based thin film /MEMS/Integration technology

Mon. Mar 21, 2016 4:00 PM - 6:00 PM P17 (Gymnasium)

4:00 PM - 6:00 PM

[21p-P17-2] Self-Aligned Metal Double-Gate Ni-SPC LT Poly-Si TFT with Sputtered High-k Gate Dielectric Layer on Glass Substrate

Shota Nibe1, Akito Hara1 (1.Tohoku Gakuin Univ.)

Keywords:Thin Film Transistor

To achieve the simple, low-cost, and high-performance metal double-gate (DG) low-temperature poly-Si TFT on the glass substrate, HfO2 gate dielectric was implemented. In addition, we applied Ni-SPC technique to form poly-Si film. DG TFT using a HfO2 demonstrated high on-current compared to those of DG TFT with SiO2 gate dielectric and top-gate (TG) TFT with HfO2.