[21p-P17-1~26] 13.4 Si wafer processing /Si based thin film /MEMS/Integration technology

△ [21p-P17-4] Effect of grain boundary on electrical characteristics of low-temperature MLB-CLC poly-Si TFTs

〇Tatsuaki Hirata¹, Nguyen Thuy¹, Hiraiwa Mituhisa¹, Kotani Kouji², Kikkawa Takamaro¹, Kuroki Shin-ichirou¹ (1.Hiroshima Univ. RNBS, 2.Tohoku Univ.)

Keywords:poly-Si TFT