[5p-C17-1~17] 13.8 Compound and power electron devices and process technology

[5p-C17-12] Evaluation of Interface State Distributions in LP-CVD SiO₂/GaN by Deep-Level

〇Hiroyuki Ueda¹, Tomohiko Mori¹, Masato Kodama¹, Yoshitaka Nagasato², Hidemoto Tomita², Kozo Kato² (1.Toyota Central R&D Labs., 2.Toyota Motor Corp.)

Keywords:GaN, Oxide film, DLTS

We have characterized interface state distributions in LP-CVD SiO2/GaN using DLTS. We have found that when SiO2 was deposited at higher substrate temperature, the shallow interface state density near conduction band was decreased.