[20a-C101-1~11] 13.4 Si wafer processing /Si based thin film /Interconnect technology/ MEMS/ Integration technology

[20a-C101-7] Fabrication of Submicron Gate Minimal SOI-CMOS Using Gate-First Process

〇Yongxun Liu¹, Kazushige Sato², Hiroyuki Tanaka^1,2, Kazuhiro Koga², Sommawan Khumpuang^1,2, Masayoshi Nagao¹, Takashi Matsukawa¹, Shiro Hara^1,2 (1.AIST, 2.MINIMAL)

Keywords:Minimal-fab, Submicron gate

So far, we have developed the minimal SOI-CMOS by using the SOI (Spin on dopant) thermal diffusion based gate-last process. In this work, we fabricated and characterized the minimal SOI-CMOS by using ion implantation based gate-first process.