The 80th JSAP Autumn Meeting 2019

Presentation information

Oral presentation

13 Semiconductors » 13.3 Insulator technology

[19p-E305-1~15] 13.3 Insulator technology

Thu. Sep 19, 2019 1:45 PM - 5:45 PM E305 (E305)

Toshifumi Irisawa(AIST), Kiyoteru Kobayashi(Tokai Univ.)

5:00 PM - 5:15 PM

[19p-E305-13] Improvement of Si0.78Ge0.22 MOS interface properties by using TiN/Y2O3 gate stacks with TMA passivation

TsungEn Lee1, Kasidit Toprasertpong1, Mitsuru Takenaka1, Shinichi Takagi1 (1.The Univ. of Tokyo)

Keywords:SiGe, interface trap density, high-k dielectric

SiGe MOSFETs have stirred much attention as p- channel devices, because of the high hole mobility and the appropriate bandgap. However, the undesired formation of GeOx in the interfacial layers (IL) can be regarded as an origin of the MOS interface degradation [1]. We have recently reported reduction in Dit by TiN/ALD Y2O3 gate stacks with PMA at 450oC [2, 3]. However, the further improvement of interface properties in the SiGe MOS gate stacks has not been fully obtained yet. In this study, we present a new passivation process by Trimethylaluminum (TMA) treatment prior to Y2O3 ALD in TiN/Y2O3/ SiGe gate stack formation to achieve the SiGe MOS interfaces with lower Dit. The MOS interface properties and the physical origins of the interface improvements with optimized cycle number of TMA passivation are systematically examined.