[10p-S221-1~10] 13.5 Semiconductor devices/ Interconnect/ Integration technologies

[10p-S221-2] [INVITED] Heavy-Ion Soft-Errors in Back-Biased Thin-BOX SOI SRAMs: Hundredfold Sensitivity due to Line-Type Multi-Cell Upsets

〇Daisuke Kobayashi¹, Kazuyuki Hirose¹, Taichi Ito², Yuya Kakehashi², Osamu Kawasaki², Takahiro Makino³, Takeshi Ohshima³, Daisuke Matsuura⁴, Takanori Narita⁴, Masahiro Kato⁴, Shigeru Ishii⁴, Kazunori Masukawa⁴ (1.ISAS/JAXA, 2.R&D/JAXA, 3.QST, 4.MHI Ltd.)

Keywords:soft error, SOI, IoT

We are sincerely honored to hear that 10th Silicon Technology Division Award is given to our paper, which has the same title as this talk. Showing recent findings, some of which were reported in previous JSAP meetings, this talk reviews the paper, in which a new soft error mechanism is suggested. Due to this mechanism, the well-known textbook model of SOI soft error no longer remains applicable in some cases. In the cases, the noise generated by radiation below the buried oxide layer is no longer negligible, leading to undesired flips of logic values stored in circuits fabricated above the buried oxide layer.