[10p-S221-1~10] 13.5 Semiconductor devices/ Interconnect/ Integration technologies

[10p-S221-6] Design and analysis of virtually nonvolatile retention SRAM using dual power-switches

〇Hayato Yoshida¹, Daiki Kitagata¹, Shuu'ichiro Yamamoto¹, Satoshi Sugahara¹ (1.FIRST, Tokyo Inst. of Tech.)

Keywords:Power gating, SRAM