[PS-1-05] Self-Aligned Deposition of Source/Drain Contact Metal with Electrodeposition Technique for High Performance Schottky Barrier Ge MOSFETs Fabrication

^○D. Zhai¹, J. Jiang^1,2, J. Li¹, X. Yu¹, R. Zhang¹, Y. Zhao¹ (1.Zhejiang Univ.(China), 2.The:51th Res. Inst. of China Electronics Tech. Group Corp.(China))

2016 International Conference on Solid State Devices and Materials |2016年9月28日(水) 11:12 〜 11:15 |PDF ダウンロード

[PS-1-06] Influence of Low Thermal Budget Plasma Oxidation and Millisecond Laser Anneal on Gate Stack Reliability in view of 3D Sequential Integration

^○C. -M. V. Lu^1,2, C. Fenouillet-Béranger¹, R. Gassilloud¹, H. Graoui³, D. Larmagnac⁴, S. Sharma³, X. Garros¹, C. Leroux¹, A. Toffoli¹, G. Romano^1,2, R. Kies¹, N. Rambal¹, M. -P. Samson², B. Previtali¹, C. Guedj¹, N. Bernier¹, S. Kerdiles¹, L. Brunet¹, P. Batude¹, T. Skotnicki², M. Vinet¹ (1.CEA-LETI(France), 2.STMicroelectronics(France), 3.Applied Materials Inc.(USA), 4.Applied Materials France(France))

2016 International Conference on Solid State Devices and Materials |2016年9月28日(水) 11:15 〜 11:18 |PDF ダウンロード

[PS-1-07] Integration of Low Temperature 480℃ SiOCN as Offset Spacer in view of 3D Sequential Integration

^○C. -M. V. Lu^1,2, C. Fenouillet-Béranger¹, C. Bout¹, A. Roule¹, V. Beugin¹, J. Fort³, C. Arvet², N. Posseme¹, V. Loup¹, P. Besson², M. -P. Samson², B. Previtali¹, C. Tabone¹, A. Michallet², N. Rochat¹, D. Benoit², F. Pierre¹, L. Brunet¹, P. Batude¹, T. Skotnicki², M. Vinet¹ (1.CEA-LETI(France), 2.STMicroelectronics(France), 3.Applied Materials France(France))

2016 International Conference on Solid State Devices and Materials |2016年9月28日(水) 11:18 〜 11:21 |PDF ダウンロード

[PS-1-08] Enhanced Electrical and Reliability Characteristics in Ge p-MOSFETs by In-situ Plasma Treatments and Capping Hf/Zr on Interfacial Layers

^○T. Huang¹, C. Hsu¹, K. S. Chang-Liao¹, Y. Hsu¹, C. Huang¹, Y. Li¹ (1.National Tsing Hua Univ.(Taiwan))

2016 International Conference on Solid State Devices and Materials |2016年9月28日(水) 11:21 〜 11:24 |PDF ダウンロード

[PS-1-09] Novel GeO_x Interface Layer Engineering by Ultra Low Power Microwave Plasma Oxidation

^○K. Shiraga¹, J. Miyahara², G. Nakamura¹, Y. Fujino¹, K. Akiyama¹, K. Tapily³, T. Harada¹, E. Hara¹, A. Tanihara¹, N. Yamamoto¹, Y. Hirota¹, T. Kaitsuka¹, T. Morimoto¹, K. Hasebe¹ (1.Tokyo Electron Ltd.(Japan), 2.Tokyo Electron Yamanashi Ltd.(Japan), 3.TEL Technology Center(USA))

2016 International Conference on Solid State Devices and Materials |2016年9月28日(水) 11:24 〜 11:27 |PDF ダウンロード

[PS-1-10] Charge Retention and Stability of Metal Nano Dots in SiO₂; First-principles Study on Metal Dependence

^○S. Yamazaki¹, Y. Asayama¹, Y. Onda¹, T. Nakayama¹ (1.Chiba Univ.(Japan))

2016 International Conference on Solid State Devices and Materials |2016年9月28日(水) 11:27 〜 11:30 |PDF ダウンロード

[PS-1-11] Microstructure Analysis of Nanosized Advanced Materials through the ACOM-TEM Technique

^○A. Valery^1,2, L. Gaben¹, M. Grégoire¹, Y. Le-Friec¹, F. Lorut¹, L. Clément¹ (1.STMicroelectronics(France), 2.Univ. Grenoble Alpes, CNRS, SIMAP(France))

2016 International Conference on Solid State Devices and Materials |2016年9月28日(水) 11:30 〜 11:33 |PDF ダウンロード

[PS-1-12(Late News)] Carrier and Heat Transport Properties of Poly-crystalline GeSn on Insulator Substrates

^○N. Uchida¹, J. Hattori¹, K. Fukuda¹, T. Maeda¹, R. Lieten^2,3, Y. Ohishi⁴, R. Takase⁵, M. Ishimaru⁵, J. Locquet³ (1.AIST(Japan), 2.IMEC(Belgium), 3.KU Leuven(Belgium), 4.Osaka univ.(Japan), 5.Kyushu Inst. of Tech.(Japan))

2016 International Conference on Solid State Devices and Materials |2016年9月28日(水) 11:33 〜 11:36 |PDF ダウンロード

[PS-1-13(Late News)] Heavy Sb-doping for Poly-GeSn on Insulator Using Pulsed Laser Annealing in Water

^○K. Takahashi^1,2, M. Kurosawa^1,3,4, H. Ikenoue⁵, M. Sakashita¹, O. Nakatsuka¹, S. Zaima^1,3 (1.Grad. Sch. of Engineering, Nagoya Univ.(Japan), 2.Research Fellow of JSPS(Japan), 3.IMaSS, Nagoya Univ.(Japan), 4.JST-PRESTO(Japan), 5.Kyushu Univ.(Japan))

2016 International Conference on Solid State Devices and Materials |2016年9月28日(水) 11:36 〜 11:39 |PDF ダウンロード

[PS-1-14(Late News)] Schottky-barrier-height Reduction for n-Si and n-Ge by Insertion of Tungsten Silicide and Germanide Films Chemically Synthesized using Gas-phase Reactions

^○N. Okada^1,2, N. Uchida², T. Kanayama² (1.JST-PRESTO(Japan), 2.AIST(Japan))

2016 International Conference on Solid State Devices and Materials |2016年9月28日(水) 11:39 〜 11:42 |PDF ダウンロード