[PS-3-13(Late News)] Multilayer TiNi Alloys as Gate Metal for InGaAs MOS Devices
2016 International Conference on Solid State Devices and Materials
|2016年9月28日(水)
734件中(391 - 400)
[PS-3-01] Accurate Design of Si-Compatible Tunneling Field-Effect Transistor with GeSn Source Junction by Ab Initio Calculation and Device Simulation
2016 International Conference on Solid State Devices and Materials
|2016年9月28日(水)
[PS-3-02] Perspective Analysis of tri-Gate Germanium Tunneling Field Effect Transistor with Dopant Segregation Region at Source/Drain
2016 International Conference on Solid State Devices and Materials
|2016年9月28日(水)
[PS-3-03] Influence of Line-Edge Roughness (LER) on Multiple-Gate (MG) Tunnel Field-Effect Transistors (TFETs)
2016 International Conference on Solid State Devices and Materials
|2016年9月28日(水)
[PS-3-04] Investigation of Ge Channel Negative Capacitance FET with Analytical Model: Impact of Ferroelectric Dielectrics
2016 International Conference on Solid State Devices and Materials
|2016年9月28日(水)
[PS-3-05] Performance Comparison of Si, In0.53Ga0.47As and GaSb 10-nm Double Gate nMOSFETs by Deterministically Solving Time Dependent BTE
2016 International Conference on Solid State Devices and Materials
|2016年9月28日(水)
[PS-3-06] Temperature and Doping Concentration Dependence Characteristics in Junctionless Gate-all-Around Polycrystalline Silicon Thin-Film-Transistors
2016 International Conference on Solid State Devices and Materials
|2016年9月28日(水)
[PS-3-07] A Physical Based Model for Negative Bias Temperature Instability
2016 International Conference on Solid State Devices and Materials
|2016年9月28日(水)
[PS-3-08] Negative Bias Temperature Instability by Body Bias on Ring Oscillators in Thin BOX Fully-Depleted Silicon on Insulator Process
2016 International Conference on Solid State Devices and Materials
|2016年9月28日(水)
[PS-3-09] Study of Self-heating Effects in Hybrid SOI/bulk Nanoscale FinFETs
2016 International Conference on Solid State Devices and Materials
|2016年9月28日(水)