[10p-W922-1~8] Progress in ion implantation for semiconductor devices -Si, GaAs and WBG materials-

[10p-W922-2] Advanced Si Power Semiconductor with High Dynamic Ruggedness utilizing Novel Vertical Structure

〇Katsumi Nakamura¹, Kenji Suzuki¹, Koichi Nishi¹ (1.Power Device Works, Mitsubishi Electric Corporation)

Keywords:Si Power Semiconductor, Vertical Structutre, Dynamic Ruggedness

The vertical structure technology which can be fabricated on large diameter wafers (≥ 200 mm) and achieves both vertical shrinking and high dynamic ruggedness is one key factor for sustainable development of Si-based power semiconductors. This paper reports an advanced Si power devices realize excellent total performance by adopting a novel vertical structure. The proposed vertical structure consists of a "Light Punch-Through (LPT) (II) buffer layer” and a “Controlling Carrier-Plasma Layer (CPL) zone”. The new vertical structure will be a promising candidate for evolving Si power devices from the viewpoint of improving device performance and matching to the manufacturing process of large Si wafer.