[A-6-3] Monolithic 150V Push-Pull Driver with High-Speed Logic

M. KIMURA, K. KANEKO, T. OKABE, M. NAGATA (1.Central Research Laboratory, Hitachi Ltd.)

1984 International Conference on Solid State Devices and Materials |PDF Download

[A-6-4] Soft-Error Generation Due to Heavy-Ion Tracks in Bipolar Integrated Circuits

J. A. Zoutendyk (1.Jet Propulsion Laboratory, California Institute of Technology)

1984 International Conference on Solid State Devices and Materials |PDF Download

[A-6-5] Circuit Simulation with Two-Dimensional MOST Models

A. Kampmann, R. Erwe, W. L. Engl (1.Institut fur Theoretische Elektrotechnik, RWTH Aachen)

1984 International Conference on Solid State Devices and Materials |PDF Download

[A-7-1] Realization of Four-Valued Logic Circuits by NMOS Devices

S. Zaima, Y. Yasuda, Y. Tokuda, K. Pak, T. Nakamura, A. Yoshida (1.Department of Electrical and Electronic Engineering, Toyohashi University of Technology)

1984 International Conference on Solid State Devices and Materials |PDF Download

[A-7-2] High Performance EEPROM Using Low Barrier Height Tunnel Oxide

N. MATSUKAWA, S. MORITA, H. NOZAWA (1.SEMICONDUCTOR DEVICE ENGINEERING LABORATORY, TOSHIBA)

1984 International Conference on Solid State Devices and Materials |PDF Download

[A-7-3] TITE RAM: A New SOI DRAM Gain Cell for Mbit DRAM's

H. Shichijo, S. D. S. Malhi, A. H. Shah, G. P. Pollack, W. F. Richardson, M. Elahy, S. Banerjee, R. Womack, P. K. Chatterjee (1.Semiconductor Process and Design Center Texas Instruments Inc.)

1984 International Conference on Solid State Devices and Materials |PDF Download

[A-7-4] Mo Gate MOS Devices Stability Using High Purity Sputtering Target

T. Amazawa, H. Oikawa, N. Shiono N. Honma (1.Atsugi Electrical Communication Laboratory, NTT, 2.Musashino Electrical Communication Laboratory, NTT)

1984 International Conference on Solid State Devices and Materials |PDF Download

[A-8] Lithography for Future Submicron Device Fabrication

Yasuo Tarui, Joseph Borel, B. F. Griffing, Koichiro Hoh, Tadao Kato, Toyoki Kitayama, M. P. Lepselter, Junji Matsui, Makoto Nakase, Jerome P. Silverman, Kenji Gamo (1.The Tokyo University of Agriculture, 2.Thomson-EFCIS, 3.Corporate R&D Center, General Electric, 4.Electrotechnical Lab., 5.LSI R&D Center, Mitsubishi Electric Co., 6.Atsugi ECL, NTT, 7.AT and T, Bell Lab., 8.Fundamental Res. Lab. Nippon Electric Co., 9.VLSI Res. Center, Toshiba Co., 10.IBM, Yorktown Heights, 11.Osaka University)

1984 International Conference on Solid State Devices and Materials |PDF Download

[B-4-1] Microanalysis and Highly Sensitive Characterization of Impurities in Semiconductors

C. Evans (1.Charles Evans and Associates)

1984 International Conference on Solid State Devices and Materials |PDF Download

[B-4-2] SIMS Analysis and Simulation of Reactive Ion Etching

H. Koyama, T. Nishioka, Y. Mashiko, M. Yoneda, S. Kawazu (1.LSI R&D Laboratory, Mitsubishi Electric Corp.)

1984 International Conference on Solid State Devices and Materials |PDF Download