[P-3-9] Multiband Simulation of Quantum Electron Transport in Nano-Scale Devices Based on Non-Equilibrium Green's Function

H. Fitriawan, S. Souma, M. Ogawa, T. Miyoshi (1.Graduate School of Science and Technology, Kobe University, 2.Department of Electrical and Electronics Engineering, Kobe University)

2006 International Conference on Solid State Devices and Materials |PDF Download

[P-3-10] Effect of Mobility Degradation and Supply Voltage on NBTI Induced Drain Current Degradation

Jone F. Chen, Dao-Hong Yang, Chih-Yung Lin, Shien-Yang Wu (1.Institute of Microelectronics, Department of Electrical Engineering, National Cheng Kung University, 2.Logic Technology Division/R&D, Taiwan Semiconductor Manufacturing Company)

2006 International Conference on Solid State Devices and Materials |PDF Download

[P-3-11] Impact of Source/Drain Si1-yCy Stressors on the Silicon-on-Insulator NMOSFETs

Jacky Huang, W.-C. Wang, J. W. Fan, S. T. Chang (1.Department of Electrical Engineering, National Chung Hsing University)

2006 International Conference on Solid State Devices and Materials |PDF Download

[P-3-12] An Analysis of Layout and Temperature Effects on Magnetic-Coupling Factor, Resistive-Coupling Factor, and Power Gain Performances of RF Transformers for RFIC Applications

Yo-Sheng Lin, Chi-Chen Chen, Yan-Ru Tzeng, Hsiao-Bin Liang (1.Department of Electrical Engineering, National Chi-Nan University)

2006 International Conference on Solid State Devices and Materials |PDF Download

[P-3-13] Modeling of Drain Bias Dependence on Threshold Voltage Shift Under Negative Gate Bias Stress of a-Si:H TFTs

Huai-Yuan Tseng, Ko-Yu Chiang, Chen-Pang Kung (1.Flexible Electronics Technology Division/Electronics and Optoelectronics Research Laboratories (EOL), 2.Industrial Technology Research Institute (ITRI))

2006 International Conference on Solid State Devices and Materials |PDF Download

[P-3-14] A New SOI Lateral Insulated Gate Bipolar Transistor and Lateral Diode employing the Separated Schottky Anode for a Power Integrated Circuit

In-Hwan Ji, Young-Hwan Choi, Min-Woo Ha, Min-Koo Han (1.School of Electrical Eng. & Computer Science #50, Seoul National University)

2006 International Conference on Solid State Devices and Materials |PDF Download

[P-3-15] Impacts of LP-SiN Capping Layer and Lateral Diffusion of interface Trap on Hot Carrier Stress of NMOSFETs

Chia-Yu Lua, Ching-Sen Lua, Yu-Lin Hsieha, Yao-Jen Leeb, Horng-Chih Lin, Tiao-Yuan Huanga (1.National Chiao Tung University, 2.National Nano Device Laboratories)

2006 International Conference on Solid State Devices and Materials |PDF Download

[P-3-16] Effects of Strained Layers on Zener Tunneling in Silicon Nanostructures

Hideki Minari, Nobuya Mori (1.Department of Electronic Engineering, Osaka University)

2006 International Conference on Solid State Devices and Materials |PDF Download

[P-3-17] A New Statistical Evaluation Method for the Variation of MOSFETs

Syunichi Watabe, Shigetoshi Sugawa, Akinobu Teramoto, Tadahiro Ohmi (1.Graduate School of Engineering, Tohoku University, 2.New Industry Creation Hatchery Center, Tohoku University)

2006 International Conference on Solid State Devices and Materials |PDF Download

[P-3-18] A Novel Self Aligned Design Adapted Gate All Around (SADAGAA) MOSFET including two stacked Channels : A High Co-Integration Potential

R. Wacquez, R. Cerutti, P. Coronel, A. Cros, D. Fleury, A. Pouydebasque, J. Bustos, S. Harrison, N. Loubet, S. Borel, D. Lenoble, D. Delille, F. Leverd, F. Judong, MP. Samson, N. Vuillet, B. Guillaumot, T. Ernst, P. Masson, T. Skotnicki (1.ST Microelectronics, 2.L2MP, 3.LETI, 4.Philips)

2006 International Conference on Solid State Devices and Materials |PDF Download