[D-8-4] Hard Mask through UV Light-induced Damage to Low-k Film During Plasma Process for Dual Damascene

N. Matsunaga^1,2, H. Okumura¹, B. Jinnai¹, S. Samukawa¹ (1.Tohoku Univ.(Japan), 2.Toshiba Corp.(Japan))

2009 International Conference on Solid State Devices and Materials |PDF Download

[D-8-5] Super-Low-k SiOCH Film (k=1.9) with High Water Resistance and High Thermal Stability Formed by Neutral-Beam-Enhanced-CVD

T. Sasaki¹, S. Yasuhara¹, T. Shimayama², K. Tajima², H. Yano², S. Kadomura², M. Yoshimaru², N. Matsunaga², S. Samukawa¹ (1.Tohoku Univ.(Japan), 2.STARC(Japan))

2009 International Conference on Solid State Devices and Materials |PDF Download

[D-9-1] The Helium Ion Microscope for Interconnect Material Imaging

W. Thompson¹, S. Ogawa², L. Stern¹, L. Scipioni¹, J. Notte¹, L. Farkas¹, L. Barriss¹ (1.Carl Zeiss SMT(USA), 2.Selete(Japan))

2009 International Conference on Solid State Devices and Materials |PDF Download

[D-9-2] Relative Density Characterization of Patterned Low-k material by VEELS

Y. Otsuka¹, Y. Shimizu¹, N. Kawasaki¹, S. Ogawa² (1.Toray Res. Center, Inc.(Japan), 2.Selete(Japan))

2009 International Conference on Solid State Devices and Materials |PDF Download

[D-9-3] Evaluation of Dielectric Constant through Direct CMP of Porous Low-k Film

M. Kodera¹, T. Takahashi¹, G. Minamihaba¹ (1.Toshiba Corp.)

2009 International Conference on Solid State Devices and Materials |PDF Download

[D-9-4] Prediction of Abnormal Etching Profile at High-Aspect-Ratio Via/ Hole Etching by using On-wafer Monitoring System

H. Ohtake¹, S. Fukuda¹, B. Jinnai¹, T. Tatsumi², T. Samukawa¹ (1.Tohoku Univ.(Japan), 2.OKI Semiconductor Miyagi Co. Ltd.(Japan))

2009 International Conference on Solid State Devices and Materials |PDF Download

[D-9-5] Integration and dielectric reliability of 30nm ½ pitch structures in Aurora ®LK HM

S. Demuynck¹, C. Huffman¹, M. Claes¹, S. Suhard¹, J. Versluijs¹, H. Volders¹, N. Heylen¹, K. Kellens¹, K. Croes¹, H. Struyf¹, G. Vereecke¹, P. Verdonck¹, D. De Roest², J. Beynet², H. Sprey², G. P. Beyer¹ (1.IMEC(Belgium), 2.ASM Belgium(Belgium))

2009 International Conference on Solid State Devices and Materials |PDF Download

[E-3-1L] A Compact Space and Efficient Drain Current Design for Multi-Pillar Vertical MOSFET's

K. Sakui¹, T. Endoh¹ (1.Tohoku Univ.)

2009 International Conference on Solid State Devices and Materials |PDF Download

[E-3-2L] Exploration of Device Design Space to Meet Circuit Speed Targeting 22nm and Beyond

L. Wei¹, F. Boeuf², D. Antoniadis³, T. Skotnicki², H. S. Philip Wong¹ (1.Stanford Univ.(USA), 2.STMicroelectronics(France), 3.Massachusetts Inst. of Tech.(USA))

2009 International Conference on Solid State Devices and Materials |PDF Download

[E-3-3L] Variability-Tolerant CMOS Gates Using Functional MOSFETs with Resistive Switching Devices

S. Yamamoto¹, S. Sugahara¹ (1.Tokyo Tech.)

2009 International Conference on Solid State Devices and Materials |PDF Download

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