2015 International Conference on Solid State Devices and Materials

Sep 27, 2015 - Sep 30, 2015
Sapporo Convention Center, Sapporo, Japan

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894 results (341 - 350)

[PS-1-5] Sub-0.2V Switching Voltage of Negative Capacitance Double Gate Tunnel FET using Ferroelectric Gate

^○M. H. Lee¹, C. Liu¹, P. G. Cheng¹, C. C. Cheng¹, K. Y. Chu¹, M. J. Xie¹, S. N. Liu¹, J. W. Lee¹, S. J. Huang¹, M. H. Liao² (1.National Taiwan Normal Univ., 2.National Taiwan Univ.(Taiwan))

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[PS-1-6] Fabrication of Low-Temperature (< 400 °C) Germanium MOSCAPs by Microwave Thermal Oxidation

^○W. C. Chi¹, C. C. Hsu^1,2, C. H. Chou¹, A. S. Shih¹, Y. J. Lee², C. H. Chien¹ (1.National Chiao Tung Univ., 2.National Nano Device Labs.(Taiwan))

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[PS-1-7] High-Performance P-Channel Polycrystalline-Germanium Thin Film Transistors via Excimer Laser Crystallization and Counter Doping

^○C. Y. Liao¹, C. Y. Huang¹, M. H. Huang¹, C. H. Chou¹, H. C. Cheng¹ (1.National Chiao Tung Univ.(Taiwan))

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[PS-1-8] UV Raman and Multiwavelength Photoluminescence Characterization of Ion Implanted Silicon for In-Line Dopant Activation Process Monitoring Applications

^○W. S. Yoo¹, T. Ishigaki¹, T. Ueda¹, K. Kang¹, N. Hasuike², H. Harima², M. Yoshimoto² (1.WaferMasters, Inc., 2.Kyoto Inst. of Tech.(USA))

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[PS-1-9] Influence of in-situ Sb-Doping on Crystalline and Electrical Characteristics of n-type Ge_1-xSn_x Epitaxial Layer

^○J. Jeon¹, T. Asano^1,2, W. Takeuchi¹, M. Kurosawa^1,3, O. Nakatsuka¹, S. Zaima^1,3 (1.Nagoya Univ., 2.Res. Fellow of the Japan Society for the Promotion of Sci., 3.EcoTopia Sci. Inst., Nagoya Univ.(Japan))

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[PS-1-10] n⁺Si/pGe Cross Heterojunctions Fabricated by Narrow Membrane Bonding

^○T. C. Liu^1,2, S. Kabuyanagi^1,2, T. Nishimura^1,2, A. Toriumi^1,2 (1.Univ. of Tokyo, 2.JST-CREST(Japan))

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[PS-1-11] PtGe-Source/Drain Ge p-MOSFET with High On/Off Ratio and Low Parasitic Resistance

^○S. Tanaka¹, Y. Nagatomi¹, Y. Nagaoka¹, K. Yamamoto¹, D. Wang¹, H. Nakashima¹ (1.Kyushu Univ.(Japan))

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[PS-1-12] Impact of Ultra-high Sn Content Sn_xGe_1-x Interlayer on Reducing Schottky Barrier Height at Metal/n-Ge Interface

^○A. Suzuki¹, O. Nakatsuka¹, S. Shibayama^1,2, M. Sakashita¹, W. Takeuchi¹, M. Kurosawa^1,3, S. Zaima^1,3 (1.Graduate School of Eng., Nagoya Univ., 2.Res. Fellow of The Japan Society for the Promotion of Sci., 3.EcoTopia Sci. Inst., Nagoya Univ.(Japan))

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[PS-1-13] Introduction of SiGe/Si Heterojunction into Novel Multilayer Tunnel FinFETs

^○Y. Morita¹, T. Mori¹, K. Fukuda¹, W. Mizubayashi¹, S. Migita¹, K. Endo¹, S. O'uchi¹, Y. X. Liu¹, M. Masahara¹, T. Matsukawa¹, H. Ota¹ (1.AIST(Japan))

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[PS-1-14] Observation of Plastic and Elastic Deformations in Ge Films of Bonded GeOI

^○T. Nishimura¹, T. Nakamura¹, T. Yajima¹, A. Toriumi¹ (1.Univ. of Tokyo(Japan))

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894 results (341 - 350)