2015 International Conference on Solid State Devices and Materials

Sep 27, 2015 - Sep 30, 2015
Sapporo Convention Center, Sapporo, Japan

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894 results (371 - 380)

[PS-2-15] Preparation of High Performance SiN_X Films Deposited by Reactive Sputtering and PECVD at Low Temperatures

^○M. Sato¹, M. B. Takeyama¹, Y. Nakata², Y. Kobayashi², T. Nakamura², A. Noya¹ (1.Kitami Inst. of Tech., 2.Fujitsu Laboratories Ltd.(Japan))

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[PS-2-16] In Situ FTIR Spectroscopic and Kinetic Studies of Cu Surface Reduction by Using Formic Acid Treatment with Pt Catalysts

^○P. W. Chou¹, C. C. Kuo¹, J. Y. Lin², J. M. Song¹ (1.National Chung Hsing Univ., 2.Indus. Tech. Res. Inst.(Taiwan))

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[PS-2-17] Measurement of the Strength at Grain Boundaries in Electroplated Copper Thin-Film Interconnections

^○T. Nakanishi¹, T. Kato¹, Y. Ichikawa¹, K. Suzuki¹, H. Miura¹ (1.Tohoku Univ.(Japan))

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[PS-2-18L] Radio Frequency Characteristics in Tantalum Nitride Thin Film Resistor

^○S. H. Kwon¹, M. Nam¹, A. Kim¹, K. Kang¹, S. J. Chae¹, S. J. Lee¹, W. S. Sul², S. G. Pyo¹ (1.Chung-Ang Univ., 2.NNFC(Korea))

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[PS-3-1] Discrete Dopant Impact on the 7 nm Nanowire Transistor Performance

^○X. Wang¹, Y. Wang², C. Riddet³, E. Towie³, B. Cheng³, X. Liu², A. Asenov^1,3 (1.Univ. of Glasgow, 2.Peking Univ., 3.Gold Standard Simulations Ltd.(UK))

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[PS-3-2] Proposal of Tunneling and Diffusion Current Hybrid MOSFET

^○K. Furukawa¹, R. Kuroda¹, T. Suwa¹, K. Hashimoto¹, A. Teramoto¹, S. Sugawa¹ (1.Tohoku Univ.(Japan))

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[PS-3-3] RF Characteristics of Poly-Si TFTs with HfO₂ Gate Dielectric Fabricated by Microwave Annealing

J. J. Tsai¹, ^○H. H. Hu¹ (1.National Taipei Univ. of Tech.(Taiwan))

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[PS-3-4] Trap-Assisted Tunneling Effects on Gate-Induced Drain Leakage in Silicon-Germanium Channel pFET

^○V. A. Tiwari¹, A. Scholze², R. Divakaruni², D. R. Nair¹ (1.Indian Inst. of Tech. Madras, 2.IBM Semiconductor Res. and Development Center(India))

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[PS-3-5] Low Frequency Noise and Mobility Correlation from RT to Low Temperatures for n-Channel Ge MOSFETs

^○S. Ghosh¹, P. Bhatt¹, Y. Tiwari¹, S. Lodha¹ (1.IIT Bombay(India))

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[PS-3-6] Comparison of Gate Structures of P-channel Poly-Si Nanowire Trench Ultra-thin Channel Juntionless Field-Effect Transistors

^○Y. C. Wu¹, K. W. Lin¹, M. S. Yeh¹, Y. R. Lin¹, M. H. Wu¹, Y. H. Lin² (1.National Tsing Hua Univ., 2.National United Univ.(Taiwan))

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894 results (371 - 380)