[J-6-4] GaN Schottky Barrier Diodes with TiN Electrode for High Efficiency Microwave Power Rectification

A. Kishi¹, Y. Itai¹, T. Shiraishi¹, K. Fukui¹, Q. Liu¹, Y. Ohno², L. Li¹, J. Ao¹ (1.The Univ. of Tokushima, 2.e-Device Inc. (Japan))

2013 International Conference on Solid State Devices and Materials |PDF Download

[J-6-5] GaN/AlN Resonant Tunneling Diode with High Peak-to-Valley Current Ratio Grown by Metal-Organic Vapor Phase Epitaxy

M. Nagase¹, T. Takahashi¹, M. Shimizu¹ (1.AIST (Japan))

2013 International Conference on Solid State Devices and Materials |PDF Download

[J-6-6] Temperature-dependent Characteristics of AlGaN-GaN-on-Si Heterojunction Field Effect Transistors (HFETs) under reverse gate bias stress

D.M. Keum¹, S.H. Choi¹, Y.J. Kang¹, J.G. Lee¹, H.Y. Cha¹, H.T. Kim¹ (1.Univ. of Hongik (Korea))

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[J-8-1] High-Frequency Characteristics of InGaAs Quantum-Well MOSFETs

D.H. Kim^1,2, T.W. Kim¹, R. Hill¹, C.Y. Kang¹, C. Hobbs¹, P.D. Kirsch¹, W. Maszara², J.A. del Alamo³ (1.SEMATECH, 2.GLOBALFOUNDRIES, 3.MIT (USA))

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[J-8-2] P₂S₅/(NH₄)₂S_x-Based Sulfur Mono-Layer Doping Technique to form Sub-10 nm Ultra-Shallow Junctions for Advanced III-V Logic Devices

S. Subramanian^1,2, E.Y.J. Kong¹, D.S. Li³, S. Wicaksono³, S.F. Yoon³, Y.C. Yeo^1,2 (1.National Univ. of Singapore, 2.NUS Graduate School for Integrative Sci. and Eng., 3.Nanyang Technological Univ. (Singapore))

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[J-8-3] Effective AlN-passivation for Improving ALD-Al₂O₃/GaAs Interface in MOS Structures Using MOCVD

T. Aoki¹, N. Fukuhara¹, T. Osada¹, H. Sazawa¹, M. Hata¹, T. Inoue¹ (1.Sumitomo Chemical Co., Ltd. (Japan))

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[J-8-4] Fabrication and Characterization of Micromachined Cantilever Loaded with a Resonant Tunneling Diode for Delta-Sigma Type Strain Sensor Applications

Y. Kakutani¹, D. Wu¹, J. Pan¹, J. Nakano¹, M. Mori¹, K. Maezawa¹ (1.Univ. Toyama (Japan))

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[K-1-1] Ge Active Photonic Devices on Si for Optical Interconnects

Y. Ishikawa¹ (1.Univ. of Tokyo (Japan))

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[K-1-2] High Performance Silicon Waveguide-Integrated PIN and Schottky Ge Photodiodes and their Link with Inverter-Type CMOS TIA Circuits

J. Fujikata^1,2, M. Noguchi^1,2, M. Miura^1,2, D. Okamoto^1,2, T. Horikawa^1,3, Y. Arakawa^1,4 (1.PECST, 2.PETRA, 3.AIST, 4.Univ. of Tokyo (Japan))

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[K-1-3] High Speed Waveguide Integrated Lateral P-I-N Ge on Si Photodiode with very Low Dark Current

L. Virot^1,2,3, L. Vivien¹, J.M. Hartmann², Y. Bogumilowicz², J.M. Fedeli², D. Marris Morini¹, E. Cassan¹, C. Baudot³, F. Boeuf³ (1.Institut d'Electronique Fondamentale, 2.CEA-Leti, 3.STMicroelectronics (France))

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