[PS-1-12] A Junctionless SOI FET with Channel Thinning by Ion Implantation (CTIFET) and its application to 6T-SRAM Cell
2019 International Conference on Solid State Devices and Materials
|Wed. Sep 4, 2019
779 results (551 - 560)
[PS-1-13] Theoretical Investigation of Performance Improvement in GeSn/SiGeSn TFET withDouble Type-II Staggered Heterojunction
2019 International Conference on Solid State Devices and Materials
|Wed. Sep 4, 2019
[PS-1-14] Novel Multi-Flux Device Simulation Method Applied to 2DEG Analyses- Drift Diffusion with subbands -
2019 International Conference on Solid State Devices and Materials
|Wed. Sep 4, 2019
[PS-1-15] Scalability and Vth Sensitivity Assessment of Core-Shell Junctionless MOSFET
2019 International Conference on Solid State Devices and Materials
|Wed. Sep 4, 2019
[PS-1-16] Impact of Hafnium Oxide-Based Ferroelectric Material on Monolayer Black Phosphorus Transistor for Negative Capacitance and Memory Application
2019 International Conference on Solid State Devices and Materials
|Wed. Sep 4, 2019
[PS-1-17] Calculation of interfacial energy for design of phase change materials
2019 International Conference on Solid State Devices and Materials
|Wed. Sep 4, 2019
[PS-1-18] Memory window and retention time of double back gate Z2-FET
2019 International Conference on Solid State Devices and Materials
|Wed. Sep 4, 2019
[PS-1-19 (Late News)] Extremely low temperature selective epitaxial processes for advanced CMOS applications
2019 International Conference on Solid State Devices and Materials
|Wed. Sep 4, 2019
[PS-1-20 (Late News)] Experiment and Modeling of Dynamical Hysteresis in thin film Ferroelectrics
2019 International Conference on Solid State Devices and Materials
|Wed. Sep 4, 2019
[PS-1-21 (Late News)] Circuit speed oriented device design scheme for double gate hetero tunnel FETs
2019 International Conference on Solid State Devices and Materials
|Wed. Sep 4, 2019