Oral presentation

13. Semiconductors A (Silicon) » 13.3 Si Process・Interconnect・MEMS・Integration

[19p-A19-1~15] 13.3 Si Process・Interconnect・MEMS・Integration

Fri. Sep 19, 2014 2:00 PM - 6:00 PM A19 (E311)

△：Young Scientist Oral Presentation Award Applied
▲：English Presentation
▼：Both Award Applied and English Presentation

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Lunch 12:30～14:00 (12:30 PM - 2:00 PM)

2:00 PM - 2:15 PM

[19p-A19-1] Fabrication of low resistivity CVD-TiN thin film using new Ti precursor

Kazuhiro Harada¹, Kimihiko Nakatani¹, ^○Hiroshi Ashihara¹, Kenji Kanayama¹ (Hitachi Kokusai Electric Inc.¹)

2:15 PM - 2:30 PM

[19p-A19-2] Diffusion and insulating barrier made en bloc of ZrN_x films

^○Masaru Sato¹, Mayumi Takeyama¹, Atsushi Noya¹ (Kitami Institute of Technology¹)

2:30 PM - 2:45 PM

▲ [19p-A19-3] Formation of Highly Pure Metallic Ruthenium Film Using Hot-wire-assisted Atomic Layer Deposition for Electrode Applications

^○Guangjie Yuan¹, Hideharu Shimizu¹, Takeshi Momose¹, Yukihiro Shimogaki¹ (The Univ. of Tokyo¹)

2:45 PM - 3:00 PM

△ [19p-A19-4] Sub-nanoscale Structure and the Barrier Performance of Cu(Mn)/Co(W) System for ULSI Cu Interconnect Proved Using 3D Atom Probe

^○(D)Kohei Shima¹, Tu Yuan², Bin Han², Yu Takamizawa², Hideharu Shimizu¹, Yasuo Shimizu², Takeshi Momose¹, Koji Inoue², Yasuyoshi Nagai², Yukihiro Shimogaki¹ (The Univ. of Tokyo¹, IMR Tohoku Univ.²)

3:00 PM - 3:15 PM

[19p-A19-5] Novel low-temperature decomposable fluorine free precursors for copper interconnect

Hiroshi Sudoh¹, Masato Ishikawa¹, ^○Hideaki Machida¹, Rasadujjaman Md², Kondoh Eiichi² (Gas-phase Growth Ltd.¹, University of Yamanashi²)

3:15 PM - 3:30 PM

[19p-A19-6] Supercritical Fluid Chemical Deposition of Cu in Ru-lined Deep Nanotrenches using a New Cu^(I) Amidinate Precursor

Md. Rasadujjaman¹, Mitsuhiro Watanabe¹, Hiroshi Sudo², Hideaki Machida², ^○Eiichi Kondoh¹ (Univ. Yamanashi¹, Gas-phase Growth²)

3:30 PM - 3:45 PM

[19p-A19-7] Novel deposition apparatus for wafer-scale Cu deposition utilizing differential pressure

^○Mitsuhiro Watanabe¹, Takahiro Ueno¹, Eiichi Kondoh¹, Satoshi Yamamoto², Tatsuo Suemasu² (Univ. Yamanashi¹, Fujikura Ltd.²)

3:45 PM - 4:00 PM

[19p-A19-8] Investigation on passivation for multilayer graphene interconnects wth Br intercation

^○Yuji Matsumoto¹, Akihiko Aozasa¹, Ryosuke Kosugi¹, Hisao Miyazaki², Makoto Wada², Naoshi Sakuma², Akihiro Kajita², Tadashi Sakai², Kazuyoshi Ueno¹ (SIT¹, LEAP²)

Break 16:00～16:15 (4:00 PM - 4:15 PM)

4:15 PM - 4:30 PM

[19p-A19-9] Properties of low-temperature deposited SiN_x films applicable to TSV process

^○Mayumi Takeyama¹, Masaru Sato¹, Atsushi Noya¹, Yasushi Kobayashi², Yoshihiro Nakata², Tomoji Nakamura² (Kitami Inst. of Technol.¹, Fujitsu Lab. Ltd.²)

4:30 PM - 4:45 PM

[19p-A19-10] Analysis of F loss during the chemical dry etching of Si using NO and F2 gases (II)

^○Satomi Tajima¹, Toshio Hayashi¹, Kenji Ishikawa¹, Makoto Sekine¹, Minoru Sasaki², Kouji Yamakawa³, Masaru Hori¹ (Nagoya Univ.¹, Toyota Tech. Inst.², Katagiri Engineering Co., Ltd.³)

4:45 PM - 5:00 PM

[19p-A19-11] Development of taper etching for low cost TSV.

^○Toshiyuki Sakuishi^1,2, Takahide Murayama^1,2, Yasuhiro Morikawa^1,2 (ULVAC.Inc.¹, NMEMS²)

5:00 PM - 5:15 PM

[19p-A19-12] Directly Depth Measurement Tool of High Aspect Ratio Via Hole for Three Dimension Stacked Device

^○Makoto Nakamura¹, Hideki Kitada¹, Seiki Sakuyama¹ (FUJITSU LIMITED¹)

5:15 PM - 5:30 PM

[19p-A19-13] Evaluation of Plasma-Damage Effects on Transistor Performance in Via-last Backside-via Process for 3D IC

^○Yohei Sugawara¹, hideto Hashiguchi¹, seiya Tanikawa¹, hisashi Kino², Takahumi Fukushima³, Kang-Wook Lee³, Mitumasa Koyanagi³, Tetsu Tanaka^1,2 (Tohoku Univ.¹, Tohoku Univ.², Tohoku Univ.³)

5:30 PM - 5:45 PM

[19p-A19-14] Thermal Deformation of Thin Si Chip With Redistribution Layer

^○Aki Dote¹, Masaru Morita¹, Hideki Kitada¹, Yoriko Mizushima², Seiki Sakuyama¹ (Fujitsu¹, Fujitsu Lab.²)

5:45 PM - 6:00 PM

[19p-A19-15] Development of alignment method for ununiform deformed board by reticle free exposure apparatus

^○Mitsunori Tone¹, Satoshi Yokoyama¹, Hiroshi Kubota¹, Masao Yoshioka² (GSST Kumamoto Univ.¹, Kumamoto Univ.²)

Session information

[19p-A19-1~15] 13.3 Si Process・Interconnect・MEMS・Integration

▲ [19p-A19-3] Formation of Highly Pure Metallic Ruthenium Film Using Hot-wire-assisted Atomic Layer Deposition for Electrode Applications

△ [19p-A19-4] Sub-nanoscale Structure and the Barrier Performance of Cu(Mn)/Co(W) System for ULSI Cu Interconnect Proved Using 3D Atom Probe