[O-4-3] 180-mV Subthreshold Operation of Crystalline Oxide Semiconductor FPGA Realized by Overdriving Programmable Power Switch and Programmable Routing Switch

^○M. Kozuma¹, Y. Okamoto¹, T. Nakagawa¹, T. Aoki¹, Y. Kurokawa¹, T. Ikeda¹, Y. Ieda¹, N. Yamade¹, H. Miyairi¹, M. Ikeda², M. Fujita², S. Yamazaki¹ (1.Semiconductor Energy Laboratory Co., Ltd., 2.Univ. of Tokyo(Japan))

2015 International Conference on Solid State Devices and Materials |2015年9月29日(火) 16:30 〜 16:50 |PDF ダウンロード

[O-4-4] Area-Efficient Non-volatile Carry Chain Based on Pass-Transistor/Atom-Switch Hybrid Logic

^○X. Bai¹, Y. Tsuji¹, A. Morioka¹, M. Miyamura¹, T. Sakamoto¹, M. Tada¹, N. Banno¹, K. Okamoto¹, N. Iguchi¹, H. Hada¹ (1.NEC Corp.(Japan))

2015 International Conference on Solid State Devices and Materials |2015年9月29日(火) 16:50 〜 17:10 |PDF ダウンロード

[O-5-1] (Invited) Harvesting the Physics of Spin and Magnetism for Low Power Logic

^○I. A. Young, S. Manipatruni, D. Nikonov (1.Intel Corp.(USA))

2015 International Conference on Solid State Devices and Materials |2015年9月29日(火) 17:25 〜 17:55 |PDF ダウンロード

[O-5-2] 10 nm p-MTJ Array Design for Suppressing Switching Delay Induced by Interference Due to Magnetic Dipole Interaction for High Density STT-MRAM

^○S. Ohuchida^1,3, K. Ito², M. Muraguchi^1,2,3, T. Endoh^1,2,3 (1.Graduate School of Engineering, Tohoku Univ., 2.CIES, Tohoku Univ., 3.JST-ACCEL(Japan))

2015 International Conference on Solid State Devices and Materials |2015年9月29日(火) 17:55 〜 18:15 |PDF ダウンロード

[O-5-3] Universal Damage Recovery Scheme using the Oxygen Showering Post-treatment (OSP) Process for Sub-20nm High Density STT-MRAM Devices

^○J. H. Jeong^{1, 2}, T. Endoh^{1, 3, 4} (1.Graduate School of Engineering, Tohoku Univ., 2.Samsung Electronics Co., Ltd., 3.CIES, Tohoku Univ., 4.JST-ACCEL, Tohoku Univ.(Japan))

2015 International Conference on Solid State Devices and Materials |2015年9月29日(火) 18:15 〜 18:35 |PDF ダウンロード

[O-5-4] Optimization of CoFeB Capping Layer Thickness for Characterization of Leakage Spot in MgO Tunneling Barrier of Magnetic Tunnel Junction

^○S. Sato^1,6, H. Honjo^1,6, S. Ikeda^1,2,3,6, H. Ohno^1,2,3,4, T. Endoh^1,2,5,6, M. Niwa^1,6 (1.CIES, Tohoku Univ., 2.CSIS, Tohoku Univ., 3.RIEC, Tohoku Univ., 4.WPI-AIMR, Tohoku Univ., 5.Gradaute School of Eng., Tohoku Univ., 6.JST-ACCEL(Japan))

2015 International Conference on Solid State Devices and Materials |2015年9月29日(火) 18:35 〜 18:55 |PDF ダウンロード

[O-6-1] (Invited) Future Prospects of Data Storage Technologies: NAND Flash Memory and Storage Class Memory Hybrid System

^○K. Takeuchi (1.Chuo Univ.(Japan))

2015 International Conference on Solid State Devices and Materials |2015年9月30日(水) 09:00 〜 09:30 |PDF ダウンロード

[O-6-2] Effects of Cell V_th State and Number of Traps on Statistical Distribution of Random Telegraph Noise in Scaled NAND Flash Memory

T. Tomita¹, ^○K. Miyaji¹ (1.Shinshu Univ.(Japan))

2015 International Conference on Solid State Devices and Materials |2015年9月30日(水) 09:30 〜 09:50 |PDF ダウンロード

[O-6-3] Improvement of Cell VT Distribution & Program Disturbance of NAND Flash Device by Using Tilt Implantation for Cell Junction Counter Doping

^○D. Y. Kim¹, N. K. Kim¹, K. T. Lee¹, H. Y. Shim¹, S. K. Park¹, B. K. Kim¹, K. B. Lee¹, H. Y. Chang¹, K. O. Ahn¹, J. W. Kim¹ (1.SK Hynix Inc.(Korea))

2015 International Conference on Solid State Devices and Materials |2015年9月30日(水) 09:50 〜 10:10 |PDF ダウンロード

[O-6-4] A New High Density FinFET OTP Technology

P. C. Peng¹, ^○Y. Z. Chen¹, H. W. Pan¹, W. Y. Hsiao², K. H. Chen², Y. H. Kuo², C. P. Lin², B. Z. Tien², T. S. Chang², Y. C. King¹, C. J. Lin¹ (1.National Tsing Hua Univ., 2.TSMC(Taiwan))

2015 International Conference on Solid State Devices and Materials |2015年9月30日(水) 10:10 〜 10:30 |PDF ダウンロード