The Japan Society of Applied Physics

463件中(81 - 90)

[B-10-2] Low-Noise and High-Frequency 0.10μm body-tied SOI-CMOS Technology with High-Resistivity Substrate for Low-Power 10Gbps Network LSI

Toshiaki Iwamatsu、Mikio Tujiuchi、Yuuichi Hirano、Takuji Matsumoto、Hiroyuki Takashino、Tatsuhiko Ikeda、Tsutomu Yoshimura、Daniel Chen、Toshihide Oka、Harufusa Kondoh、Takashi Ipposhi、Shigeto Maegawa、Yasuo Inoue、Masahide Inuishi、Yuzuru Ohji (1.Advanced Device Development Dept., Renesas Technology Corp.、2.High Frequency & Optical Semiconductor Division, Mitsubishi Electric Corporation)

2003 International Conference on Solid State Devices and Materials |PDF ダウンロード

[B-10-6L] Double Gate MOSFET by ESS (Empty Space in Silicon) Architecture

Tsutomu Sato、Hideaki Nii、Masayuki Hatano、Yoshimitsu Kato、Kazutaka Ishigo、Keiichi Takenaka、Hisataka Hayashi、Tomoyuki Hirano、Kazuhiko Ida、Takeshi Watanabe、Nobutoshi Aoki、Kazumi Ino、Shigeru Kawanaka、Ichiro Mizushima、Yoshitaka Tsunashima (1.Process & Manufacturing Engineering Center, SoC Research & Development Center、2.Semiconductor Company, Toshiba Corporation)

2003 International Conference on Solid State Devices and Materials |PDF ダウンロード

463件中(81 - 90)