The Japan Society of Applied Physics

566件中(341 - 350)

[J-5-4] Mechanism of Threshold Voltage Reduction and Hole Mobility Enhancement in pMOSFETs Employing Sub-1nm EOT HfSiON by Use of Substrate Fluorine Ion Implantation

Seiji Inumiya、Akira Uedono、Seiichi Miyazaki、Shingo Ohtsuka、Takeo Matsuki、Tetsunori Wada、Takayuki Aoyama、Keisaku Yamada、Yasuo Nara (1.Semiconductor Leading Edge Technologies, Inc. (Selete)、2.Univ. of Tsukuba、3.Hiroshima Univ.、4.Waseda Univ.)

2006 International Conference on Solid State Devices and Materials |PDF ダウンロード

[J-7-1] Optimization of Hafnium Zirconate (HfZrOx) Gate Dielectric for Device Performance and Reliability

R. I. Hegde、D. H. Triyoso、S. Kalpat、S. B. Samavedam、J. K. Schaeffer、E. Luckowski、C. Capasso、D. C. Gilmer、M. Raymond、D. Roan、J. Nguyen、L. La、E. Hebert、X-D. Wang、R. Gregory、R. S. Rai、J. Jiang、T. Y. Luo、B. E. White Jr. (1.Freescale Semiconductor, Inc., Austin Silicon Technology Solutions (ASTS))

2006 International Conference on Solid State Devices and Materials |PDF ダウンロード

[J-8-1] Highly scalable and WF-tunable Ni(Pt)Si/SiON TOSI-gate CMOS devices obtained in a CMP-less integration scheme

M. Muller、G. Bidal、A. Mondot、S. Denorme、C. Fenouillet-Beranger、F. Boeuf、D. Aime、M. Rafik、P. Gouraud、T. Kormann、G. Chabanne、A. Zauner、G. Braeckelmann、S. Bonnetier、D. Barge、C. Laviron、A. Toffoli、A. Tarnowka、S. Pokrant、T. Skotnicki (1.Philips Semiconductors、2.STMicroelectronics、3.Freescale、4.CEA-LETI)

2006 International Conference on Solid State Devices and Materials |PDF ダウンロード

566件中(341 - 350)