Oral presentation

13 Semiconductors » 13.4 Si wafer processing /Si based thin film /MEMS/Integration technology

[19a-S423-1~13] 13.4 Si wafer processing /Si based thin film /MEMS/Integration technology

Sat. Mar 19, 2016 9:00 AM - 12:30 PM S423 (S4)

Minoru Sasaki(Toyota Tech. Inst.), Takaaki Tsunomura(Tokyo Electron Ltd.)

△：Young Scientist Oral Presentation Award Applied
▲：English Presentation
▼：Both Award Applied and English Presentation

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9:00 AM - 9:15 AM

[19a-S423-1] Fabrication and Characterization of SOI-CMOS Integrated Circuits by Minimal Fab and Mega Fab Hybrid Process

〇Yongxun Liu¹, Sommawan Khumpuang^1,2, Masayoshi Nagao¹, Hara Shiro^1,2 (1.AIST, 2.MINIMAL)

9:15 AM - 9:30 AM

[19a-S423-2] CMOSFET Fabrication by Minimal Spin-on Dopant Process(2)

〇Kazuhiro Koga^1,2, Fumito Imura^1,2, Yuji Kitayama², Sommawan Khumpuang^1,2, Shiro Hara^1,2 (1.AIST, 2.MINIMAL)

9:30 AM - 9:45 AM

[19a-S423-3] Oscillation Characteristics of Ring Oscillators Fabricated by Minimal Fab

〇Fumito Imura^1,2, Kazuhiro Koga^1,2, Sommawan Khumpuang^1,2, Shiro Hara^1,2 (1.AIST, 2.Minimal Fab)

9:45 AM - 10:00 AM

[19a-S423-4] Process of Thin Thermal Oxide Film Using a Minimal Focused Light Heating Furnace with a Sealed Chamber

〇Noriko Miura¹, Takeshi Yamada^1,2, Takeshi Aizawa^1,2, Shinichi Ikeda^1,3, Yuuki Ishida^1,3, Takanori Mikahara^1,3, Hiroshi Nishizato^1,4, Norio Umeyama^1,3, Yasuhiro Onishi^1,2, Sommawan Khumpuang^1,3, Shiro Hara^1,3 (1.MINIMAL, 2.YONEKURA, 3.AIST, 4.HORIBA STEC)

10:00 AM - 10:15 AM

[19a-S423-5] Study of uniformity on thermal oxide on a wafer formed by a minimal laser heating furnace

〇kazushige sato¹, Haruki Toonoe¹, Takashi Chiba^1,3, Masao Terada^1,3, Shinichi Ikeda^1,2, Sommawan Khumpuang^1,2, Shiro Hara^1,2 (1.Minimal Fab Development Association, 2.AIST, 3.Sakaguchi E.H VOC Corp)

10:15 AM - 10:30 AM

[19a-S423-6] Heating characteristics of the minimal furnace that can irradiate laser from the backside of a wafer

10:30 AM - 10:45 AM

[19a-S423-7] Minimal Fab Process using High-Speed MP and CMP Machines

〇Norio Umeyama^1,2, Kazuhiro Koga^1,2, Fumito Imura^1,2, Kazutaka Shibuya³, Takayuki Fuse³, Yoshio Nakamura³, Kouichiro Ichikawa³, Sommawan Khumpuang^1,2, Shiro Hara^1,2 (1.AIST, 2.MINIMAL, 3.Fujikoshi Machinery)

11:00 AM - 11:15 AM

[19a-S423-8] Half-Inch Silicon CVD Reactor Using Concentrated Infrared Light Heater (6)

〇NING LI¹, HITOSHI HABUKA¹, TAKANORI MIKAHARA², SHIN-ICHI IKEDA^2,3, YUUKI ISHIDA^2,3, SHIRO HARA^2,3 (1.Yokohama National Univ., 2.MINIMAL, 3.AIST)

11:15 AM - 11:30 AM

[19a-S423-9] Effect of thermal convection on Minimal Si-CVD equipment

〇Takanori Mikahara^1,2, Noriko Miura¹, Yuuki Ishida², Takahiro Ito³, Shinichi Ikeda², Hitoshi Habuka⁴, Sommawan Khumpuang², Shiro Hara² (1.MINIMAL, 2.AIST, 3.ORIENTAL MOTOR, 4.Yokohama N Univ)

11:30 AM - 11:45 AM

[19a-S423-10] Evaluation of high-resolution maskless exposure using point array method

〇Yuuji Kitayama¹, Nobuo Takeda³, Sommawan Khumpuang^1,2, Shiro Hara^1,2 (1.MINIMAL, 2.AIST, 3.DNK)

11:45 AM - 12:00 PM

[19a-S423-11] Techniques to improve the etching pattern resolution with high-speed gas-switching Bosch process and minimal multiple exposure process

〇Hiroyuki Tanaka^1,2, Hisato Ogiso^1,2, Shizuka Nakano^1,2, Toshiyasu Hayami^2,3, Toshiya Miyazaki^2,3, Ryoichi Irita^2,4, Sommawan Khumpuang^1,2, Shiro Hara^1,2 (1.AIST, 2.MINIMAL, 3.SPPT, 4.PMT)

12:00 PM - 12:15 PM

[19a-S423-12] Characterization of wafer shape in minimal flatness tester

〇HARUKI TONOE¹, Yoshiaki Matsuhashi^1,2, Minoru Kamitomai^1,2, Kazuhiro Sato^1,2, Sommawan Khumpuang^1,3, Shiro Hara^1,3 (1.MINIMAL, 2.KURODA, 3.AIST)

12:15 PM - 12:30 PM

[19a-S423-13] Development of particle-number standard wafers for calibrating wafer-surface-scanners (Ⅲ)

〇naoko tajima^1,2, Kenjiro Iida^1,2, Kensei Ehara¹, Sommawan Khumpuang^1,2, Shiro Hara^1,2 (1.AIST, 2.MINIMAL)

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