The Japan Society of Applied Physics

473件中(81 - 90)

[B-10-3] Planar Double Gate CMOS transistors with 40nm metal gate for multipurpose applications

M. Vinet、T. Poiroux、J. Widiez、J. Lolivier、B. Previtali、C. Vizioz、B. Guillaumot、P. Besson、J. Simon、F. Martin、S. Maitrejean、P. Holliger、B. Biasse、M. Casse、F. Allain、A. Toffoli、D. Lafond、J.M. Hartmann、R. Truche、V. Carron、F. Laugier、A. Roman、Y. Morand、D. Renaud、M. Mouis、S. Deleonibus (1.CEA/DRT-LETI、2.STMicroelectronics、3.IMEP (UMR CNRS/INPG/UJF))

2004 International Conference on Solid State Devices and Materials |PDF ダウンロード

473件中(81 - 90)