[B-3-4] Is a “Power Optimized” Roadmap Realistic for High Performance Applications?

Frederic Boeuf, Thomas Skotnicki (1.STMicroelectronics)

2007 International Conference on Solid State Devices and Materials |PDF Download

[B-5-1] Experimental Study of Uniaxial Stress Effects on Coulomb-limited Electron and Hole Mobility in Si-MOSFETs

Shigeki Kobayashi, Masumi Saitoh, Yukio Nakabayashi, Ken Uchida (1.Advanced LSI Technology Laboratory, Toshiba Corporation)

2007 International Conference on Solid State Devices and Materials |PDF Download

[B-5-2] Physical Mechanism for Hole Mobility Enhancement in (110)-Surface Strained-Si/Strained-SiGe Structures with Anisotropic/Biaxial Strain

T. Mizuno, T. Irisawa, N. Hirashita, Y. Moriyama, T. Tezuka, N. Sugiyama, S. Takagi (1.MIRAI-AIST, 2.MIRAI-ASET, 3.Kanagawa University, 4.The University of Tokyo)

2007 International Conference on Solid State Devices and Materials |PDF Download

[B-5-3] Behavior of Low-Temperature Phonon-Limited Electron Mobility of Double-Gate Field-Effect Transistor with (111) Si Surface Channel

Tsuyoshi Yamamura, Shingo Sato, Yasuhisa Omura (1.Graduate School of Sci. & Eng, Kansai University)

2007 International Conference on Solid State Devices and Materials |PDF Download

[B-5-4] Mobility Degradation in (110)-Oriented Ultra-thin Body Double-Gate pMOSFETs with SOI Thickness of less than 5nm

Ken Shimizu, Toshiro Hiramoto (1.Inst. of Industrial Science and CINQIE, University of Tokyo)

2007 International Conference on Solid State Devices and Materials |PDF Download

[B-6-1] Modeling of Floating-Body Effect in SOI-MOSFET with Complete Surface-Potential Description

Takahiro Murakami, Makoto Ando, Norio Sadachika, Mitiko Miura-Mattausch (1.HiSIM Research Center, Hiroshima University)

2007 International Conference on Solid State Devices and Materials |PDF Download

[B-6-2] Device Performance and Reliability Considerations of Biaxially Strained Si by Wafer-Bonding-Technology

W. Y. Loh, D. S. H. Chan, D. Y. J. Choo, S. M. Koh, R. Yang, X. W. Zhang, C. Cai, G. Q. Lo, D-L Kwong (1.Institute of Microelectronics, 2.National University of Singapore, 3.Institute of High Performance Computing)

2007 International Conference on Solid State Devices and Materials |PDF Download

[B-6-3] LDMOS Model for Device and Circuit Optimization

M. Yokomichi, M. Miyake, T. Kajiwara, N. Sadachika, A. Yumisaki, H.J. Mattausch, M. Miura-Mattausch (1.Hiroshima University)

2007 International Conference on Solid State Devices and Materials |PDF Download

[B-6-4] A New Insulated Gate Bipolar Transistor Structure employing an Embedded Over-current Protection Device

In-Hwan Ji, Kyu-Heon Cho, Young-Hwan Choi, Soo-Seong Kim, Kwang-Hoon Oh, Chong-Man Yun, Min-Koo Han (1.School of Electrical Eng., Seoul Nat’l Univ., 2.Fairchild Semiconductor Dodang-Dong)

2007 International Conference on Solid State Devices and Materials |PDF Download

[B-7-1] NMOS Current Enhancement and Layout Dependency Improvement by Using Atomic Layer Deposition SIN Spacer

H. Nagai, K. Ookoshi, H. Morioka, T. Mori, M. Kojima, Y. Takao, M. Kase, K. Hashimoto (1.Fujitsu Ltd.)

2007 International Conference on Solid State Devices and Materials |PDF Download

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