[P-5-2] Low-Power Image-Segmentation VLSI Design based on a Pixel-Block Scanning Architecture

K. Okazaki¹, K. Awane¹, N. Nagaoka¹, T. Sugahara¹, T. Koide¹, H. J. Mattausch¹ (1.Hiroshima Univ., Japan)

2008 International Conference on Solid State Devices and Materials |PDF Download

[P-5-3] A Digital-Pixel-Sensor-Based Global Feature Extraction VLSI for Real-Time Image Recognition

H. Zhu¹, T. Shibata¹ (1.Univ. of Tokyo, Japan)

2008 International Conference on Solid State Devices and Materials |PDF Download

[P-5-4] Analytic Parameter Extraction of On-chip Spiral Inductors using a Modified Skin Effect Model

S. Lee¹, H. Jhon¹, I. Song¹, H. Shin¹ (1.Seoul National Univ., Korea)

2008 International Conference on Solid State Devices and Materials |PDF Download

[P-5-5] An Optimal Design Method for Even-Stage Ring Oscillators with a CMOS Latch

K. Nakamura¹, M. Asano¹, Y. Kohara¹, H. Koike² (1.Kyushu Inst. of Tech., 2.Fukuoka Industry, Sci. and Tech. Foundation, Japan)

2008 International Conference on Solid State Devices and Materials |PDF Download

[P-5-6] Additional 12% Power Reduction in Practical Digital Chips of Low-Power Design using Post-Fabrication Clock-Timing Adjustment

E. Takahashi¹, T. Susa², M. Murakawa¹, T. Furuya², T. Higuchi¹, S. Furuichi³, Y. Ueda³, A. Wada³ (1.AIST, 2.Toho Univ., 3.Sanyo Electric Co., Ltd., Japan)

2008 International Conference on Solid State Devices and Materials |PDF Download

[P-5-7] Battery-less Telemetry System with a Closed-loop Power Control for Bio-Implantable Applications

K. Kiyoyama¹, Y. Tanaka², M. Onoda³, T. Fukushima¹, T. Tanaka¹, M. Koyanagi¹ (1.Tohoku Univ., 2.Nagasaki Inst. of Applied Sci., 3.Terumo Corp., Japan)

2008 International Conference on Solid State Devices and Materials |PDF Download

[P-5-8] Low Gate Charge Power VDMOSFETs with Dual-Gate Floating NP Well Design

C. N. Liao¹, F. T. Chien², Y. T. Tsai¹ (1.National Central Univ., 2.Feng Chia Univ., Taiwan)

2008 International Conference on Solid State Devices and Materials |PDF Download

[P-5-9] A Novel Match-line Charging Control Scheme with a New Sense Amplifier for High-Speed and Low-Power Content-Addressable Memory

M. Hasan¹, T. Rahman¹, N. Hasan¹, A. B. M. H. Rashid¹, A. R. Patwary² (1.Bangladesh Univ. of Eng. and Tech., Bangladesh, 2.Oregon State Univ., USA)

2008 International Conference on Solid State Devices and Materials |PDF Download

[P-5-10] A Novel Inductance Evaluation Method for Clip-Type Inductors and Meander Inductors Under the Impedance Matched Condition

S. Shimizu¹, Y. Aoki¹, K. Honjo¹ (1.Univ. of Electro-Communications, Japan)

2008 International Conference on Solid State Devices and Materials |PDF Download

[P-5-11L] A 33% Improvement in Efficiency of Wireless Inter-Chip Power Delivery by Thin Film Magnetic Material

K. Niitsu¹, Y. Yuxiang¹, H. Ishikuro¹, T. Kuroda¹ (1.Keio Univ., Japan)

2008 International Conference on Solid State Devices and Materials |PDF Download

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