[A-4-1] Possibilities and Limitations of Bipolar Devices

T. H. Ning (1.IBM Thomas J. Watson Research Center)

1984 International Conference on Solid State Devices and Materials |PDF ダウンロード

[A-4-2] A 30 ps Si Bipolar IC Using Super Self-Aligned Process Technology

Shinsuke KONAKA、Yousuke YAMAMOTO、Tetsushi SAKAI (1.Atsugi Electrical Communication Laboratory, NTT)

1984 International Conference on Solid State Devices and Materials |PDF ダウンロード

[A-4-3] Giga Hertz Band Tunable Limiting Amplifier Using Bipolar Super Self-Aligned Process Technology

Yukio Akazawa、Katsushi Iwashita、Noboru Ishihara、Shinsuke Konaka、Mamoru Ohara (1.Atsugi Electrical Communication Laboratory, NTT、2.Yokosuka Electrical Communication Laboratory, NTT)

1984 International Conference on Solid State Devices and Materials |PDF ダウンロード

[A-4-4] Si Bipolar Multi-Gbit/s Logic Family Using Super Self-Aligned Process Technology

Haruhiko ICHINO、Masao SUZUKI、Kazuo HAGIMOTO、Shinsuke KONAKA (1.Atsugi & Yokosuka Electrical Communication Laboratory)

1984 International Conference on Solid State Devices and Materials |PDF ダウンロード

[A-5-1] Device and Materials Implications of VLSI's

Shojiro ASAI (1.Central Research Laboratory, Hitachi, Ltd.)

1984 International Conference on Solid State Devices and Materials |PDF ダウンロード

[A-5-2] A 0.85 ns 1Kb Bipolar ECL RAM

Hiroshi MIYANAGA、Shinsuke KONAKA、Yousuke YAMAMOTO、Tetsushi SAKAI (1.Atsugi Electrical Communication Laboratory, NTT)

1984 International Conference on Solid State Devices and Materials |PDF ダウンロード

[A-5-3] ABC -- An Advanced Bipolar-CMOS VLSI Technology

Y. Okada、K. Kaneko、S. Kudoh、K. Yamazaki、T. Okabe (1.Central Research Laboratory, Hitachi Ltd.、2.Takasaki Works, Hitachi Ltd.)

1984 International Conference on Solid State Devices and Materials |PDF ダウンロード

[A-5-4] Low-Power, High-Speed Bi CMOS Memory Circuits

Goroh KITSUKAWA、Noriyuki HOMMA、Hisayuki HIGUCHI、Makoto SUZUKI、Takahide IKEDA、Katsumi OGIUE (1.Central Research Labolatory、2.Hitachi Research Labolatory、3.Device Development Center, Hitachi, Ltd.)

1984 International Conference on Solid State Devices and Materials |PDF ダウンロード

[A-6-1] Scaled CMOS and Latch-Up Analysis

Koichi KANZAKI、Hiroyuki NIHIRA、Junich MATSUNAGA、Susumu KOHYAMA (1.Semiconductor Device Engineering Laboratory Integrated Circuit Division TOSHIBA Corporation)

1984 International Conference on Solid State Devices and Materials |PDF ダウンロード

[A-6-2] A CMOS Latch-Up Model Including Non-Linear Effects

Takahiro AOKI、Ryota KASAI、Shoji HORIGUCHI (1.Atsugi Electrical Communication Laboratory, NTT)

1984 International Conference on Solid State Devices and Materials |PDF ダウンロード