[J-5-4] Mechanism of Threshold Voltage Reduction and Hole Mobility Enhancement in pMOSFETs Employing Sub-1nm EOT HfSiON by Use of Substrate Fluorine Ion Implantation
2006 International Conference on Solid State Devices and Materials |PDF ダウンロード
566件中(341 - 350)
2006 International Conference on Solid State Devices and Materials |PDF ダウンロード
2006 International Conference on Solid State Devices and Materials |PDF ダウンロード
2006 International Conference on Solid State Devices and Materials |PDF ダウンロード
2006 International Conference on Solid State Devices and Materials |PDF ダウンロード
2006 International Conference on Solid State Devices and Materials |PDF ダウンロード
2006 International Conference on Solid State Devices and Materials |PDF ダウンロード
2006 International Conference on Solid State Devices and Materials |PDF ダウンロード
2006 International Conference on Solid State Devices and Materials |PDF ダウンロード
2006 International Conference on Solid State Devices and Materials |PDF ダウンロード
2006 International Conference on Solid State Devices and Materials |PDF ダウンロード