[A-6-4] Schottky-Barrier Height Tuning of Nickel Silicide on Epitaxial Silicon-Carbon Films with High Substitutional Carbon Content

P. S. Y. Lim¹, R. T. P. Lee¹, A. E. J. Lim¹, A. T. Y. Koh¹, M. Sinha¹, D. Z. Chi², Y. C. Yeo¹ (1.National Univ. of Singapore, 2.Inst. of Materials Res. and Eng., Singapore)

2008 International Conference on Solid State Devices and Materials |PDF Download

[A-7-1] Pushing Bulk Transistor with Conventional SiON Gate Oxide for Low Power Applications

G. Bidal^1,3, F. Boeuf¹, F. Payet¹, S. Denorme¹, N. Loubet¹, P. Perreau², C. Mezzomo^1,3, M. Marin¹, D. Fleury^1,3, C. Leyris¹, F. Leverd¹, P. Gouraud¹, C. Laviron², R. Beneyton¹, A. Torres², B. Imbert¹, D. Delille⁴, L. Clement¹, G. Ghibaudo³, T. Skotnicki¹ (1.STMicroelectronics, 2.CEA-LETI, 3.IMEP, France, 4.FEI, Netherlands)

2008 International Conference on Solid State Devices and Materials |PDF Download

[A-7-2] Additive Process Induced Strain (APIS) Technology for L_g = 30nm Band-Edge High-k/Metal Gate nMOSFET

M. M. Hussain¹, K. Rader², C. Smith³, C. Young¹, S. Suthram⁴, C. Park¹, M. Cruz¹, P. D. Kirsch¹, R. Jammy⁵ (1.SEMATECH, 2.Texas State Univ., 3.Univ. of North Texas, 4.Univ. of Florida, 5.IBM Assignee, USA)

2008 International Conference on Solid State Devices and Materials |PDF Download

[A-7-3] Vertical Scaling of Metal/High-k Gate Stacked MOSFETs for Hp45 and Beyond

T. Matsuki¹, T. Watanabe¹, T. Morooka¹, M. Sato¹, M. Kadoshima¹, T. Onizawa¹, T. Eimori¹, M. Nakamura¹, Y. Nara¹, Y. Ohji¹ (1.Selete, Japan)

2008 International Conference on Solid State Devices and Materials |PDF Download

[A-7-4] V_fb Lowering Effect of TaC/Rare Earth Metal/TaC Laminated Gate Electrode Applicable to N-MISFET with HfSiON and its Physical Origins before and after High-Temperature Annealing

R. Ichihara¹, M. Koyama¹ (1.Toshiba Corp., Japan)

2008 International Conference on Solid State Devices and Materials |PDF Download

[A-8-1] Low V_t Metal-Gate/High-k CMOS from Understanding the Mechanism to Innovative Solution (Invited)

A. Chin^1,2, C. H. Cheng², N. C. Su³, S. J. Wang³, C. C. Liao^1,2, C. P. Chou², H. L. Hwang^1,4 (1.Nano-Electronics Consortium of Taiwan, 2.National Chiao Tung Univ., 3.National Cheng Kung Univ., 4.National Tsing Hua Univ., Taiwan)

2008 International Conference on Solid State Devices and Materials |PDF Download

[A-8-2] Improvement of Metal/High-k Device Performance by 40-Milli-Second Flash Lamp Annealing by using Flexibly-Shaped-Pulse Technology

T. Onizawa¹, S. Kato¹, T. Aoyama¹, Y. Nara¹, Y. Ohji¹ (1.Selete, Japan)

2008 International Conference on Solid State Devices and Materials |PDF Download

[A-8-3] Dual Metal Gate Technology with Metal Inserted FUSI Stack (MIFS) using Single Phase FUSI for Scaled High-k CMOSFETs

M. Kadoshima¹, T. Matsuki¹, T. Aminaka¹, E. Kurosawa¹, M. Kitajima¹, T. Aoyama¹, Y. Nara¹, Y. Ohji¹ (1.Selete, Japan)

2008 International Conference on Solid State Devices and Materials |PDF Download

[A-8-4] Hybrid Gate Structures of NMOS : Poly-Si / PMOS : 2 Layers Ni-FUSI by using Flash Lamp Anneal (FLA) and CMP

H. Ohta¹, S. Akiyama², H. Fukutome¹, K. Ookubo², K. Kawamura², N. Idani², S. Satoh¹ (1.Fujitsu Labs. Ltd., 2.Fujitsu Microelectronics Ltd., Japan)

2008 International Conference on Solid State Devices and Materials |PDF Download

[A-9-1] Influence of the Light Irradiation on Galvanic Corrosion of Metal Gate

D. Watanabe^1,2, H. Aoki¹, J. Jong-Hyeon¹, C. Kimura¹, T. Sugino¹ (1.Osaka Univ., 2.Daikin Industries, Ltd., Japan)

2008 International Conference on Solid State Devices and Materials |PDF Download