[A-7-2] Effect of Coulomb Scattering on Stress-Induced Mobility Degradation in nMOSFETs with HfAlOX/SiO2 Dielectrics

W. Mizubayashi, N. Yasuda, H. Hisamatsu, H. Ota, K. Tominaga, K. Iwamoto, K. Yamamoto, T. Horikawa, T. Nabatame, A. Toriumi (1.MIRAI-ASRC AIST, 2.MIRAI-ASET, AIST, 3.Department of Materials Science, The University of Tokyo, Japan)

2003 International Conference on Solid State Devices and Materials |PDF Download

[A-7-3] Influence of Dielectric Constant Distribution in Stacked Gate Dielectrics on Electron Mobility in Inversion Layers

Mizuki Ono, Takamitsu Ishihara, Akira Nishiyama (1.Advanced LSI Technology Laboratory, Corporate R&D Center, Toshiba Corporation)

2003 International Conference on Solid State Devices and Materials |PDF Download

[A-7-4] Characterization of Soft Breakdown Effects for Post-deposition NH3 Plasma Treated HfO2 Gate Dielectrics

Jer Chyi Wang, De Ching Shie, Tan Fu Lei, Chung Len Lee (1.Department of Electronics Engineering, National Chiao Tung University)

2003 International Conference on Solid State Devices and Materials |PDF Download

[A-8-1] Schottky Barrier Height Reduction and Drive Current Improvement in Metal Source/Drain MOSFET with Strained-Si Channel

Atsushi Yagishita, Tsu-Jae King, Jeffrey Bokor (1.Process & Manufacturing Engineering Center, Semiconductor Company, Toshiba Corporation, 2.University of California at Berkeley, Department of Electrical Engineering and Computer Sciences)

2003 International Conference on Solid State Devices and Materials |PDF Download

[A-8-2] Experimental Evidence of Gate-Induced Schottky Barrier Height Lowering due to Image Force in Gated Schottky Diodes

A. Kinoshita, K. Uchida, J. Koga (1.Advanced LSI Technology Laboratory, Toshiba Corp.)

2003 International Conference on Solid State Devices and Materials |PDF Download

[A-8-3] Intelligent BSIM4 Model Parameter Extraction for Sub-100 nm MOSFETs era

Yiming Li, Yen-Yu Cho (1.Department of Nano Device Technology, National Nano Device Laboratories, 2.Microelectronics and Information Systems Research Center, National Chiao Tung University, 3.Department of Computer and Information Science, National Chiao Tung University)

2003 International Conference on Solid State Devices and Materials |PDF Download

[A-8-4] 0.13μm Low-K/Cu Logic CMOS Based Technology for High Performance Analog Devices

J. C. Guo, W.Y. Lien, T.L. Tsai, S.M. Chen, C.M. Wu, Y.C. Sun, Ping Yang (1.Deptartment of Electronics Engineering, National Chiao Tung University, 2.Research Development Center, Taiwan Semiconductor Manufacturing Corp)

2003 International Conference on Solid State Devices and Materials |PDF Download

[A-9-1] Re-Examination on the Universality of Si-MOS Inversion Layer Mobility

H. Irie, K. Kita, K. Kyuno, S. Takagi, K. Takasaki, M. Kubota, S. Saito, S. Nishikawa, A. Toriumi (1.Department of Materials Science, School of Engineering, The University of Tokyo, 2.Semiconductor Technology Academic Research Center (STARC))

2003 International Conference on Solid State Devices and Materials |PDF Download

[A-9-2] Channel direction impact of (110) surface Si substrate on performance improvement in sub-100 nm MOSFETs

Hidetatsu Nakamura, Tatsuya Ezaki, Toshiyuki Iwamoto, Mitsuhiro Togo, Nobuyuki Ikarashi, Masami Hane, Toyoji Yamamoto (1.Silicon Systems Research Labs., NEC Corporation)

2003 International Conference on Solid State Devices and Materials |PDF Download

[A-9-3] Characterization of Plasma Nitridation Impact on Lateral Extension Profile in 50nm N-MOSFET by Scanning Tunneling Microscopy

Hidenobu Fukutome, Takashi Saiki, Mitsuaki Hori, Takuji Tanaka, Ryou Nakamura, Hiroshi Arimoto (1.FUJITSU LABORATORIES LTD., Silicon technologies laboratories, Advanced CMOS technology lab., 2.FUJITSU LTD., Advanced LSI development div.)

2003 International Conference on Solid State Devices and Materials |PDF Download

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