[B-2-2] Compact Modeling of Ballistic Nanowire MOSFETs

K. Natori¹ (1.Univ. of Tsukuba, Japan)

2008 International Conference on Solid State Devices and Materials |PDF Download

[B-2-3] Investigate the Effects of Channel Materials & Channel Orientations on the Performance of Nanowire FETs

C. S. Koong¹, G. Samudra¹, G. Liang¹ (1.National Univ. of Singapore, Singapore)

2008 International Conference on Solid State Devices and Materials |PDF Download

[B-2-4] Advantages of Densely Packed Multi-Wire Transistors with a Planar Gate Structure and a Low-k Buried Insulator over Planar SOI Devices

M. Ono¹, K. Uchida², T. Tezuka¹ (1.Toshiba Corp., 2.Tokyo Tech., Japan)

2008 International Conference on Solid State Devices and Materials |PDF Download

[B-2-5] Modeling and Analysis of Short-Channel Effects in Double-Gate MOSFETs

K. Ishimura¹, N. Sadachika¹, M. Miura-Mattausch¹ (1.Hiroshima Univ., Japan)

2008 International Conference on Solid State Devices and Materials |PDF Download

[B-3-1] Low GIDL Characteristics on Fin-FET with Source/Drain Extension Engineering for 22nm Node Low Power Devices

K. Hayashi¹, T. Iwamatsu¹, R. Tsuchiya², K. Ishikawa¹, T. Terada¹, H. Shinohara¹, K. Eikyu¹, T. Uchida¹, H. Oda¹, Y. Inoue¹ (1.Renesas Tech. Corp., 2.Hitachi, Ltd., Japan)

2008 International Conference on Solid State Devices and Materials |PDF Download

[B-3-2] Physical and Electrical Design of FinFET based SRAM Bitcell for 22nm Node and Below

S. C. Song¹, M. Abu-Rahma¹, B. M. Han¹, S. S. Yoon¹, J. Wang¹, W. Yang², C. Hu², G. Yeap¹ (1.Qualcomm Inc., 2.Univ. of California Berkeley, USA)

2008 International Conference on Solid State Devices and Materials |PDF Download

[B-3-3] Gate-All-Around 4-nm Silicon Nanowire Schottky Barrier MOSFET with 1-D NiSi Source/Drain

J. W. Peng^1,2,3, S. J. Lee², G. C. Albert Liang², N. Singh¹, C. M. Ng³, G. Q. Lo¹, D. L. Kwong¹ (1.Inst. of Microelectronics, 2.National Univ. of Singapore, 3.Chartered Semiconductor Manufacturing Ltd., Singapore)

2008 International Conference on Solid State Devices and Materials |PDF Download

[B-3-4] Erbium/Platinum Silicided Gate-All-Around Silicon Nanowire Schottky Source/Drain MOSFETs

E. J. Tan^1,2,3, K. L. Pey¹, N. Singh², G. Q. Lo², D. Z. Chi³, Y. K. Chin¹, L. J. Tang² (1.Nanyang Technological Univ., 2.Inst. of Microelectronics, 3.Inst. of Materials Res. and Eng., Singapore)

2008 International Conference on Solid State Devices and Materials |PDF Download

[B-3-5L] Principal Guideline of Stress Design Engineering for Drivability Enhancement and Suppression of Variability in PMOSFET with SiGe S/D

M. Nishikawa¹, N. Tamura², Y. Shimamune², A. Hatada¹, K. Ikeda², T. Yamamoto², T. Miyashita², Y. S. Kim², T. Kubo¹, T. Sukegawa¹, M. Fukuda¹, K. Sukegawa², H. Kurata², M. Kase¹, K. Hashimoto¹ (1.Fujitsu Microelectronics Ltd., 2.Fujitsu Labs. Ltd., Japan)

2008 International Conference on Solid State Devices and Materials |PDF Download

[B-5-1] Design and Optimization of Gate Sidewall Spacers to Achieve 45nm Ground Rule for High-performance Applications

T. Miyashita¹, K. Ookoshi², A. Hatada², K. Ikeda¹, Y. S. Kim¹, M. Nishikawa², T. Sakoda¹, K. Hosaka¹, H. Kurata¹ (1.Fujitsu Labs. Ltd., 2.Fujitsu Microelectronics Ltd., Japan)

2008 International Conference on Solid State Devices and Materials |PDF Download

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