[D-4-2] Understandings on Surface Orientation Impacts on Random Telegraph Signal Noise Related Carriers Trapping Time Constants and Current Fluctuations

J. Chen¹, I. Hirano¹, Y. Mitani¹ (1.Toshiba Corp. (Japan))

2013 International Conference on Solid State Devices and Materials |PDF Download

[D-4-3] Analyzing the Reliability of High-k Dielectric Metal Gate MOSFETs by Using Random Telegraph Signal

D.C. Huang¹, J. Gong², C.F. Huang¹ (1.National Tsing Hua Univ., 2.Tunghai Univ. (Taiwan))

2013 International Conference on Solid State Devices and Materials |PDF Download

[D-4-4] A method to determine the lateral trap position in ultra-scaled MOSFETs

Y.Y. Illarionov^1,2, S.E. Tyaginov^1,2, M. Bina¹, T. Grasser¹ (1.Inst. for Microelectronics, TU Vienna, 2.Ioffe Physical-Technical Inst. (Austria))

2013 International Conference on Solid State Devices and Materials |PDF Download

[D-5-1] Experimental proof of direct correlation between hydrogen migrated to SiO₂/Si interface and MOSFET characteristics using high energy ¹⁵N²⁺ ion beam

M. Suzuki¹, R. Takaishi¹, Y. Higashi¹, M. Tomita¹, Y. Mitani¹, M. Matsumoto², K. Fukutani² (1.Toshiba Corp., 2.Univ. of Tokyo (Japan))

2013 International Conference on Solid State Devices and Materials |PDF Download

[D-5-2] A New Atomic Defect Model for Positive-Bias Temperature Instability in the High-k Gate n-MOSFET

C.J. Gu¹, D.S. Ang¹ (1.Nanyang Tech. Univ. (Singapore))

2013 International Conference on Solid State Devices and Materials |PDF Download

[D-5-3] Recovery and universality in NBTI from the viewpoint of traps

Y. Yonamoto¹ (1.Hitachi, Ltd., Yokohama Research Laboratory (Japan))

2013 International Conference on Solid State Devices and Materials |PDF Download

[D-6-1] Ultralow-Voltage Operation SOTB Technology toward Energy Efficient Electronics

N. Sugii¹, T. Iwamatsu¹, Y. Yamamoto¹, H. Makiyama¹, H. Shinohara¹, H. Oda¹, S. Kamohara¹, Y. Yamaguchi¹, T. Mizutani², K. Ishibashi³, T. Hiramoto² (1.Low-power Electronics Association & Project (LEAP), 2.The Univ. of Tokyo, 3.The Univ. of Electro-Communications (Japan))

2013 International Conference on Solid State Devices and Materials |PDF Download

[D-6-2] Speed Enhancement at V_dd = 0.4 V and Randam τ_pd Variability Reduction of Silicon on Thin Buried Oxide (SOTB)

H. Makiyama¹, Y. Yamamoto¹, H. Shinohara¹, T. Iwamatsu¹, H. Oda¹, N. Sugii¹, K. Ishibashi², Y. Yamaguchi¹ (1.Low-power Electronics Association & Project (LEAP), 2.The Univ. of Electro-Communications (Japan))

2013 International Conference on Solid State Devices and Materials |PDF Download

[D-6-3] Influence of work function variation in a metal gate on fluctuation of current-onset voltage for undoped-channel FinFETs

T. Matsukawa¹, Y.X. Liu¹, K. Endo¹, J. Tsukada¹, H. Yamauchi¹, Y. Ishikawa¹, S. O'uchi¹, W. Mizubayashi¹, H. Ota¹, S. Migita¹, Y. Morita¹, M. Masahara¹ (1.AIST (Japan))

2013 International Conference on Solid State Devices and Materials |PDF Download

[D-6-4] Comparison of Minimum Operation Voltage (Vmin) in Fully Depleted Silicon-on-Thin-BOX (SOTB) and Bulk SRAM Cells

T. Mizutani¹, Y. Yamamoto², H. Makiyama², H. Shinohara², T. Iwamatsu², H. Oda², N. Sugii², T. Hiramoto¹ (1.Univ. of Tokyo, 2.Low-power Electronics Association & Project (LEAP) (Japan))

2013 International Conference on Solid State Devices and Materials |PDF Download

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