[C-7-3] Advanced CMOS Technology on Sapphire Substrate for RF Systems on a Chip

Y.-C. Tseng, J. Cable, M. Stuber, R. Reedy, J. C. S. Woo (1.Department of Electrical Engineering, University of California, 2.Peregrine Semiconductor Corporation)

2000 International Conference on Solid State Devices and Materials |PDF Download

[C-7-4] On the Temperature Dependence of Hysteresis Effect in Floating-Body Partially-Depleted SOI CMOS Circuits

R. Puri, C. T. Chuang, M. B. Ketchen, M. M. Pelella, M. G. Rosenfield (1.IBM T. J. Watson Research Center, 2.University of Florida)

2000 International Conference on Solid State Devices and Materials |PDF Download

[C-8-1] A Novel Fabrication Technique of Ultra-Thin and Relaxed SiGe Buffer Layers with High Ge Content for Sub-100 nm Strained Silicon-on-Insulator MOSFETs

Tsutomu Tezuka, Naoharu Sugiyama, Tomohisa Mizuno, Masamichi Suzuki, Shin-ichi Takagi (1.Advanced LSI Technology Laboratory, Corporate R&D Center, Toshiba Corporation, 2.Environmental Engineering and Analysis Center, Corporate R&D center, Toshiba corporation)

2000 International Conference on Solid State Devices and Materials |PDF Download

[C-8-2] Design of SiGe/Buried Oxide Layered Structure to Form Highly Strained Si Layer on Insulator for SOI MOSFETs

N. Sugiyama, T. Mizuno, M. Suzuki, S. Takagi (1.Advanced LSI Technology Laboratory, Corporate R&D Center, Toshiba Corporation, 2.Environmental Engineering and Analysis Center, Corporate R&D Center, Toshiba Corporation)

2000 International Conference on Solid State Devices and Materials |PDF Download

[C-8-3] Optimization of Selective Epitaxy Process for Elevated Source/Drain Applicable to 0.15 μm Fully Depleted CMOS on 25 nm SOI

Toshiyuki Nakamura, Hideaki Matsuhashi, Yoshiaki Katakura, Jun Kanamori (1.VLSI Research Center, Oki Electric Industry, Co., Ltd.)

2000 International Conference on Solid State Devices and Materials |PDF Download

[C-8-4] Advanced Co Salicide Technology for Sub-0.20 μm FD-SOI Devices

Takashi Ichimori, Norio Hirashita, Jun Kanamori (1.Oki Electric Industry Co. Ltd., VLSI Research Center)

2000 International Conference on Solid State Devices and Materials |PDF Download

[C-8-5] Proposal of a Partial-Ground-Plane(PGP) Silicon-on-Insulator(SOI) MOSFET for Deep Sub-100-nm Channel Regime

Shin-ichiro Yanagi, Atsushi Nakakubo, Yasuhisa Omura (1.High-Tech. Research Center and Faculty of Eng., Kansai University)

2000 International Conference on Solid State Devices and Materials |PDF Download

[C-8-6] Reduced Reverse Narrow Channel Effect in Thin SOI nMOSFET's

S. J. Chang, C. Y. Chang, S. D. Wu, T. Y. Huang, T. S. Chao (1.Department of Electronics Engineering, National Chiao Tung University, 2.National Nano Device Labs.)

2000 International Conference on Solid State Devices and Materials |PDF Download

[LC-2-1] Comparison in Splitting Bonded SOI by Solid and Fluid Wedges (Water and Air Jets)

Kiyofumi Sakaguchi, Kazutaka Yanagita, Hirokazu Kurisu, Hirokazu Suzuki, Kazuaki Ohmi, Takao Yonehara (1.ELTRAN Business Center, Canon Inc.)

2000 International Conference on Solid State Devices and Materials |PDF Download

[C-9-1] A Single Chip Automotive Control LSI Using SOI BiCDMOS

Kazunori Kawamoto, Shoji Mizuno, Hirofumi Abe, Yasushi Higuchi, Seiji Fujino, Isao Shirakawa (1.Electronics Device R&D, DENSO CORPORATION, 2.Department of Information System Engineering, Graduate School of Engineering, Osaka University)

2000 International Conference on Solid State Devices and Materials |PDF Download