[J-5-4] Mechanism of Threshold Voltage Reduction and Hole Mobility Enhancement in pMOSFETs Employing Sub-1nm EOT HfSiON by Use of Substrate Fluorine Ion Implantation
2006 International Conference on Solid State Devices and Materials |PDF Download
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2006 International Conference on Solid State Devices and Materials |PDF Download
2006 International Conference on Solid State Devices and Materials |PDF Download
2006 International Conference on Solid State Devices and Materials |PDF Download
2006 International Conference on Solid State Devices and Materials |PDF Download
2006 International Conference on Solid State Devices and Materials |PDF Download
2006 International Conference on Solid State Devices and Materials |PDF Download
2006 International Conference on Solid State Devices and Materials |PDF Download
2006 International Conference on Solid State Devices and Materials |PDF Download
2006 International Conference on Solid State Devices and Materials |PDF Download
2006 International Conference on Solid State Devices and Materials |PDF Download