[J-8-2] Sub-30 nm P-channel Schottky Source/Drain FinFETs: Integration of Pt3Si FUSI Metal Gate and High-κ Dielectric

Rinus T. P. Lee, Kian-Ming Tan, Andy Eu-Jin Lim, Tsung-Yang Liow, Guo-Qiang Lo, Ganesh Samudra, Dong Zhi Chi, Yee-Chia Yeo (1.Silicon Nano Device Lab., Dept. of Electrical & Computer Engineering, National University of Singapore, 2.Institute of Materials Research and Engineering, 3.Institute of Microelectronics)

2006 International Conference on Solid State Devices and Materials |PDF Download

[J-8-3] Effects of Optimization of Gate Edge Profile on sub-45nm Metal Gate High-k Dielectric Metal-Oxide-Semiconductor Field Effect Transistors Characteristics

C. Y. Kang, R. Choi, S. H. Bae, S. C. Song, M. M. Hussain, C. Young, D. Heh, G. Bersuker, B. H. Lee (1.SEMATECH, 2.Microelectronics Research Center, Department of Electrical and Computer Engineering, The University of Texas)

2006 International Conference on Solid State Devices and Materials |PDF Download

[J-8-4] Compatibility of ALD Hafnium Silicate with Dual Metal Gate CMOS Integration

Muhammad Mustafa Hussain, Seung-Chul Song, Chang Yong Kang, Manuel Quevedo-Lopez, Husam Alshareef, Barry Sassman, Rino Choi, Byoung Hun Lee (1.SEMATECH, 2.Texas Instruments Assignee, 3.IBM Assignee)

2006 International Conference on Solid State Devices and Materials |PDF Download

[J-8-5] Full-Metal-Gate Integration of Dual-Metal-Gate HfSiON CMOS Transistors by Using Oxidation-Free Dummy-Mask Process

F. Ootsuka, Y. Tamura, Y. Akasaka, S. Inumiya, H. Nakata, M. Ohtsuka, T. Watanabe, M kitajima, Y. Nara, K. Nakamura (1.Semiconductor Leading Edge Technologies, Inc. (Selete))

2006 International Conference on Solid State Devices and Materials |PDF Download

[J-9-1] Degradation and Breakdown of Sub-1nm EOT HfO2/Metal Gate Stacks

G. Groeseneken, R. Degraeve, T. Kauerauf, M. Cho, M. Zahid, L-A. Ragnarsson, D. P. Brunco, B. Kaczer, Ph. Roussel, S De Gendt (1.IMEC, 2.KU Leuven, 3.Seoul National University, 4.John Moores University, 5.Intel assignee at IMEC)

2006 International Conference on Solid State Devices and Materials |PDF Download

[J-9-2] Impact of Captured-Carrier Distribution on Recovery Characteristics of Positive- and Negative- Bias Temperature Instability in HfSiON/SiO2 Gate Stack

Izumi Hirano, Takeshi Yamaguchi, Yuichiro Mitani, Katsuyuki Sekine, Mariko Takayanagi, Kazuhiro Eguchi, Hideki Satake (1.Advanced LSI Technology Laboratory, Corporate R&D Center, 2.Semiconductor Company, Toshiba Corporation)

2006 International Conference on Solid State Devices and Materials |PDF Download

[J-9-3] Reliability of thick oxides integrated with HfSiOx gate dielectric

B. H. Lee, C. Y. Kang, T. H. Lee, J. Barnett, R. Choi, S. C. Song, R. Jammy (1.SEMATECH, 2.IBM assignee, 3.University of Texas at Austin)

2006 International Conference on Solid State Devices and Materials |PDF Download

[J-9-4] Impact of Initial Traps on TDDB and NBTI Reliabilities in High-k Gate Dielectrics

Kenji OKADA, Hiroyuki OTA, Tsuyoshi HORIKAWA, Masaru KADOSHIMA, Arito OGAWA, Toshihide NABATAME, Akira TORIUMI (1.MIRAI-ASET, AIST, 2.MIRAI-ASRC-AIST, 3.The University of Tokyo)

2006 International Conference on Solid State Devices and Materials |PDF Download

[J-9-5] Leakage mechanism of ultrathin SiON gate dielectric

Hiroshi Watanabe, Daisuke Matsushita, Kouichi Muraoka, Koichi Kato (1.Advanced LSI Technology Labs, Toshiba Corp.)

2006 International Conference on Solid State Devices and Materials |PDF Download

[J-10-1] Work Function Modulation by Segregation of Indium through Tungsten Gate For Dual-Metal Gate CMOS Applications

Kazuaki NAKAJIMA, Masato KOYAMA, Tomonori AOYAMA, Akira NISHIYAMA, Kazuhiro EGUCHI, Kyoichi SUGURO (1.Semiconductor Company, Toshiba Corporation, 2.Research and Development Center, Toshiba Corporation)

2006 International Conference on Solid State Devices and Materials |PDF Download