[PS-4-4] A Source-Side Injection Single-Poly Split-Gate Cell Technology for Embedded Flash Memory

Y. Yamauchi¹, Y. Kamakura¹, T. Matsuoka¹ (1.Univ. of Osaka (Japan))

2013 International Conference on Solid State Devices and Materials |PDF Download

[PS-4-5] Effect with Nano Dot Type Storage Layer Structure on Channel Region in 20nm Planar NAND Flash Memory Cell

T. Sasaki^1,2, M. Muraguchi^1,2, M.S. Seo³, S.K. Park³, T. Endoh^1,2 (1.Tohoku Univ., 2.JST-CREST, 3.SK hynix Inc. (Japan))

2013 International Conference on Solid State Devices and Materials |PDF Download

[PS-4-6L] Extraction of Trapped Charge Profile in Space and Energy in P-Channel SONOS Memory Device

Y.Y. Chiu¹, B.J. Yang¹, F.H. Li¹, R.W. Chang¹, S.F. Ng¹, W.T. Sun², C.J. Hsu², C.W. Kuo², C.Y. Lo², R. Shirota¹ (1.National Chiao Tung Univ., 2.eMemory Tech. Inc. (Taiwan))

2013 International Conference on Solid State Devices and Materials |PDF Download

[PS-5-1] An 8-ch, 20-V Output CMOS Switching Driver with 3.3-V Power Supply for Integrated MEMS Devices Controlling

M. Takayasu¹, A. Shirane¹, S. Lee¹, D. Yamane¹, H. Ito¹, X. Mi², H. Inoue², F. Nakazawa², S. Ueda², N. Ishihara¹, K. Masu¹ (1.Tokyo Institute of Tech., 2.Fujitsu Labs. Ltd. (Japan))

2013 International Conference on Solid State Devices and Materials |PDF Download

[PS-5-2] A Multi-sensor Readout Circuit Using Multiple Differential-input Operation Amplifier with Pulse Output

R.L. Wang¹, C.C. Fu¹, C. Yu¹, Y.T. Chuang², C.F. Lin², H.H. Liao², H.H. Tsai², Y.Z. Juang² (1.National Kaohsiung Normal Univ., 2.National Chip Implementation Center, National Applied Research Lab. (Taiwan))

2013 International Conference on Solid State Devices and Materials |PDF Download

[PS-5-3] A Stabilization Technique for Intermediate Power Level in Stacked-Vdd ICs using Parallel I/O Signal Coding

T. Nishiyama¹, T. Koizuka¹, H. Okamura¹, T. Yamanokuchi¹, K. Nakamura¹ (1.Kyushu Inst. of Tech. (Japan))

2013 International Conference on Solid State Devices and Materials |PDF Download

[PS-5-4] A High-Voltage Isolated Current Sense Amplifier for Fully CMOS Compatible Non-volatile Memories

C.Y. Huang¹, C.Y. Wu¹, H. Lin¹ (1.National Chung Hsing Univ. (Taiwan))

2013 International Conference on Solid State Devices and Materials |PDF Download

[PS-5-5] Emulation of High Frequency Substrate Noise in CMOS Digital Circuits with Effects of Adjusting Clock Skew

S. Shimazaki¹, S. Taga¹, T. Makita¹, N. Azuma¹, N. Miura¹, M. Nagata¹ (1.Kobe Univ. (Japan))

2013 International Conference on Solid State Devices and Materials |PDF Download

[PS-5-6] High Power and High Q Spiral Inductors using TSV Processes.

J.M. Yook¹, D.S. Kim¹, J.C. Kim¹ (1.Korea Electronics Technology Inst. (Korea))

2013 International Conference on Solid State Devices and Materials |PDF Download

[PS-5-7] Design Optimization Methodology for Ultra Low Power Analog Circuits using Intuitive Inversion-level and Saturation-level Parameter

T. Eimori¹, K. Anami¹, N. Yoshimatsu¹, T. Hasebe², K. Murakami^1,3 (1.Institute of Systems, Information Technologies and Nanotechnologies, 2.Qualiarc Technology Solutions,Inc., 3.Kyushu Univ. (Japan))

2013 International Conference on Solid State Devices and Materials |PDF Download

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