[N-3-2] Direct Evidence of Free-carrier Induced Band-gap Narrowing in Ge

^○S. Kabuyanagi¹, T. Nishimura¹, T. Yajimia¹, A. Toriumi¹ (1.Unv. of Tokyo(Japan))

2015 International Conference on Solid State Devices and Materials |Tue. Sep 29, 2015 9:30 AM - 9:50 AM |PDF Download

[N-3-3] Incorporated Nitrogen Behavior in Plasma-nitrided Silicon Oxides Formed by Chemical Vapor Deposition Method

^○N. Shinoda¹, H. Itokawa¹, R. Fujitsuka¹, K. Sekine¹, S. Onoue¹, J. Tonotani¹ (1.Toshiba Corp.(Japan))

2015 International Conference on Solid State Devices and Materials |Tue. Sep 29, 2015 9:50 AM - 10:10 AM |PDF Download

[N-3-4] Comprehensive Understanding of SiO₂-IL Scavenging in HfO₂/SiO₂/Si Stack

X. Li¹, T. Yajima¹, T. Nishimura¹, ^○A. Toriumi¹ (1.Univ. of Tokyo(Japan))

2015 International Conference on Solid State Devices and Materials |Tue. Sep 29, 2015 10:10 AM - 10:30 AM |PDF Download

[N-4-1] Beyond GeO₂ on Ge: Network Modification of GeO₂ for Reliable Ge Gate Stacks

^○C. Lu¹, C. H. Lee¹, T. Nishimura¹, A. Toriumi¹ (1.Univ of Tokyo(Japan))

2015 International Conference on Solid State Devices and Materials |Tue. Sep 29, 2015 3:40 PM - 4:00 PM |PDF Download

[N-4-2] Understanding on the Impact of Interface Reactions on Dipole Strengths at MgO/SiO₂ and Y₂O₃/SiO₂ Interfaces

^○J. Fei¹, K. Kita¹ (1.Univ. of Tokyo(Japan))

2015 International Conference on Solid State Devices and Materials |Tue. Sep 29, 2015 4:00 PM - 4:20 PM |PDF Download

[N-4-3] Positive and Negative Dipole Layer Formation at High-k/SiO₂ Interfaces Simulated by Classical Molecular Dynamics

^○K. Shimura¹, R. Kunugi¹, A. Ogura^2,5, S. Satoh^3,5, J. Fei⁴, K. Kita⁴, T. Watanabe^1,5 (1.Waseda univ., 2.Meiji univ., 3.Univ. of Hyogo, 4.Univ. of Tokyo, 5.JST-CREST(Japan))

2015 International Conference on Solid State Devices and Materials |Tue. Sep 29, 2015 4:20 PM - 4:40 PM |PDF Download

[N-4-4] Thermodynamic Knob for High Performance SiGe Gate Stack Formation

^○C. T. Chang¹, T. Nishimura¹, A. Toriumi¹ (1.Univ. of Tokyo(Japan))

2015 International Conference on Solid State Devices and Materials |Tue. Sep 29, 2015 4:40 PM - 5:00 PM |PDF Download

[N-5-1] (Invited) Engineering high-k/InGaAs Interface for Extremely Scaled Gate Stacks

^○D. H. Zadeh¹, H. Oomine², K. Kakushima², H. Iwai² (1.NTT Device Tech. Labs., 2.Tokyo Tech(Japan))

2015 International Conference on Solid State Devices and Materials |Tue. Sep 29, 2015 5:25 PM - 5:55 PM |PDF Download

[N-5-2] Impact of La₂O₃ Interfacial Layers on InGaAs MOS Interface Properties in ALD Al₂O₃/La₂O₃/InGaAs Gate Stacks

^○C. Y. Chang^1,2, M. Takenaka^1,2, S. Takagi^1,2 (1.Univ. of Tokyo, 2.JST-CREST(Japan))

2015 International Conference on Solid State Devices and Materials |Tue. Sep 29, 2015 5:55 PM - 6:15 PM |PDF Download

[N-5-3] First Demonstration of 300mm InGaAs-On-Insulator Substrates Fabricated using the Smart Cut^TM Technology

^○J. Widiez^1,2, S. Sollier^1,2, T. Baron^1,3, M. Martin^1,3, G. Gaudin⁴, F. Mazen^1,2, F. Madeira^1,2, S. Favier^1,2, A. Salaun^1,2, S. Arnaud^1,3, S. David^1,3, E. Beche^1,2, GrampeixH. ^1,2, C. Veytizou⁴, D. Delprat⁴, T. Signamarcheix^1,2 (1.Univ. Grenoble Alpes, 2.CEA-LETI, 3.CNRS-LTM, 4.SOITEC(France))

2015 International Conference on Solid State Devices and Materials |Tue. Sep 29, 2015 6:15 PM - 6:35 PM |PDF Download