[S-III-10] Active Matrix Liquid Crystal Displays(AMLCD's) and Active Matrix Electroluminescent (AMEL) Displays Using Silicon-On-Insulator(SOI) Technology

A. C. IPRI, G. DOLNY, R. G. STEWART, R. KHORMAEI, C. KING, M. SPITZER, D-P VU, T. KEYSER, G. BECKER, D. KAGEY, M. TILTON, H. FRANKLIN, R. ELLIS, M. JEPPSON, M. HELGESON, S. NELSON (1.David Sarnoff Research Center, 2.Planar America, 3.Kopin Corp, 4.Allied Signal Aerospace, 5.Standish Industries, 6.Honeywell Corp.)

1995 International Conference on Solid State Devices and Materials |PDF Download

[S-III-11] Comparison of 1/4-Micron-Gate Fully-Depleted CMOS/SIMOX and Bulk Gate Arrays for Low-Voltage, Low-Power Applications

Y. Kado, H. Inokawa, K. Nishimura, Y. Okazaki, M. Sato, T. Ohno, T. Tsuchiya, M. Ino, K. Takeya, T. Sakai (1.NTT LSI Laboratories)

1995 International Conference on Solid State Devices and Materials |PDF Download

[S-III-12] High-Speed 0.5μm SOI 1/8 Frequency Divider with Body-Fixed Structure for Wide Range of Applications

T. Iwamatsu, Y. Yamaguchi, K. Ueda, K. Mashiko, Y. Inoue, T. Hirao (1.ULSI Laboratory, System LSI Laboratory, Mitsubishi Electric Corporation)

1995 International Conference on Solid State Devices and Materials |PDF Download

[S-III-13] New MOS Current Mode Logic Using SOI-MOSFET with Body Terminal

N. Terao, T. Matsumoto, Y. Kudoh, S. Pidin, M. Koyanagi (1.Department of Machine Intelligence and System Engineering, Faculty of Engineering, Tohoku University)

1995 International Conference on Solid State Devices and Materials |PDF Download

[C-4-1] Planarization by Polishing: Chemical Processes in Dielectric and Metal CMP

Lee M. Cook (1.Rodel, Inc.)

1995 International Conference on Solid State Devices and Materials |PDF Download

[C-4-2] Ultra-Uniform CMP Using a Hydro Film Buffered Chuck (Hydro Chuck)

Yoshihiro Hayashi, Tsutomu Nakajima, Takemitsu Kunio (1.Microelectronics Research Laboratories, NEC)

1995 International Conference on Solid State Devices and Materials |PDF Download

[C-4-3] A Post Gigabit Generation Flash Memory Shallow Trench Isolation Scheme. The LATI-STI Process (LArge Tilt Implanted Sloped Trench Isolation) Using 100% CMP Planarization

S. DELEONIBUS, M. HEITZMANN, Y. GOBIL, F. MARTIN, O. DEMOLLIENS, J. -C. GUIBERT (1.LETI(CEA) Dept de Microelectronique CENG)

1995 International Conference on Solid State Devices and Materials |PDF Download

[C-4-4] Highly Manufacturable Shallow Trench Isolation for Giga Bit DRAM

B. H Roh, Y. H Cho, Y. G Shin, C. G hong, S. D Gwun, K. Y Lee, H. G Kang, K. N kim, J. W Park (1.R&D Center, Samsung Electronics Co., LTD.)

1995 International Conference on Solid State Devices and Materials |PDF Download

[PC-5-1] Characterization of Charged Traps near Si-SiO2 Interface in Photo-CVD SiO2 Film

Hideaki YAMAMOTO, Sinya IWASAKI, Katsuhide OKUMURA, Takeshi KANASHIMA, Masanori OKUYAMA, Yoshihiro HAMAKAWA (1.Department of Electrical Engineering, Faculty of Engineering Science, Osaka University)

1995 International Conference on Solid State Devices and Materials |PDF Download

[PC-5-2] Leakage Current Conduction Mechanism of Liquid Phase Deposited (LPD)SiO2 Film

Tso-Hung Fan, Shyue-Shyh Lin, Ching-Fa Yeh (1.Department of Electronics Engineering & Institute of Electronics, National Chiao-Tung University)

1995 International Conference on Solid State Devices and Materials |PDF Download