[PC-11-1] A 0.25μm CMOSFET Using Halo Implantation for 1Gb DRAM

Dongjin JUNG, Jaekwan PARK, Kangyoon LEE, Namsoo KANG, Kinam KIM, Taeearn SHIM, Jongwoo PARK (1.R & D Center, Samsung Electronics, Co., LTD.)

1995 International Conference on Solid State Devices and Materials |PDF Download

[PC-11-2] Substrate Engineering for Reduction of α-Particle-Induced Charge Collection Efficiency

T. YAMASHITA, S. KOMORI, T. KUROI, M. INUISHI, T. HIRAO (1.ULSI Laboratory, Mitsubishi Electric Corporation)

1995 International Conference on Solid State Devices and Materials |PDF Download

[PC-11-3] A Comparative Study of Interface Trap Induced Drain Leakage Current in Various n-MOSFET Structures

Tahui Wang, T. E. Chang, L. P. Chiang, C. Huang (1.Department of Electronics Engineering, Institute of Electronics, National Chiao-Tung University, 2.Technology Development Dept., Macronix International Co.)

1995 International Conference on Solid State Devices and Materials |PDF Download

[PC-11-4] Reliability of Non-Uniformly Doped Channel (NUDC) MOSFETs for Sub-Quarter-Micron Region

M. Shirahata, Y. Okumura, Y. Abe, T. Kuroi, M. Inuishi, T. Hirao (1.ULSI Laboratory, Mitsubishi Electric Corporation, 2.Semiconductor Research Laboratory, Mitsubishi Electric Corporation)

1995 International Conference on Solid State Devices and Materials |PDF Download

[PC-11-5] An Experimental Study of Impact Ionization Phenomena in Sub-0.1μm Si MOSFETs

Atsushi Hori, Akira Hiroki, Kaori Moriyama Akamatsu, Shinji Odanaka (1.Semiconductor Research Center, Matsushita Electric Ind. Co.)

1995 International Conference on Solid State Devices and Materials |PDF Download

[PC-11-6] Influence of N2O-Oxynitridation on Interface Trap Generation in Surface-Channel PMOSFETs

Toshimasa MATSUOKA, Shigenari TAGUCHI, Kenji TANIGUCHI Chihiro HAMAGUCHI, Seizo KAKIMOTO, Keiichiro UDA (1.Department of Electronic Engineering, Osaka University, 2.Central Research Laboratories, Sharp Corporation)

1995 International Conference on Solid State Devices and Materials |PDF Download

[PC-11-7] Stress Effect on the Reliability of pMOS TFTs for 16 Mb SRAM: DC Stress at Room and Elevated Temperatures

K. S. Son, H. K. Yoon, Y. J. Lee, S. Ahn, D. M. Kim (1.Semiconductor Research Laboratory, Hyundai Electronics Industry Co., LTD, and, 2.Department of Electrical Engineering, Pohang University of Science and Technology)

1995 International Conference on Solid State Devices and Materials |PDF Download

[PC-11-8] Development of Sub-Quarter-μm MONOS Type Memory Transistor

Thomas Bohm, Akihiro Nakamura, Hiroshi Aozasa, Machio Yamagishi, Yasutoshi Komatsu (1.Advanced Devices Department, ULSI R&D Laboratories, Semiconductor Company, Sony Corporation)

1995 International Conference on Solid State Devices and Materials |PDF Download

[PC-12-1] A High Pressure High Temperature Poly Buffer LOCOS (HP-HTPBL) Isolation Process for 1Gbit Density Non Volatile Memories

S. DELEONIBUS, F. MARTIN, S. S. KIM, A. EMAMI, B. FLORIN, M. HEITZMANN, C. LEROUX (1.LETI(CEA) Dept de Microelectronique, 2.GASONICS International)

1995 International Conference on Solid State Devices and Materials |PDF Download

[PC-12-2] A Novel Planarization of Trench Isolation Using a Polysilicon Layer As a Self-Aligned Mask

Juing-Yi Cheng, Tan Fu Lei, Tien Sheng Chao, Daniel L. W. Yen, B. Y. Jin, C. J. Lin (1.Department of Electronics Engineering and Institute of Electronics National Chiao Tung University and, 2.National Nano Device Laboratory, 3.Macronix International Co., LTD.)

1995 International Conference on Solid State Devices and Materials |PDF Download

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